CN104468014A - Method for improving time synchronization precision under complex network environment - Google Patents

Method for improving time synchronization precision under complex network environment Download PDF

Info

Publication number
CN104468014A
CN104468014A CN201410760462.3A CN201410760462A CN104468014A CN 104468014 A CN104468014 A CN 104468014A CN 201410760462 A CN201410760462 A CN 201410760462A CN 104468014 A CN104468014 A CN 104468014A
Authority
CN
China
Prior art keywords
time delay
time
threshold values
delay
algorithm
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
CN201410760462.3A
Other languages
Chinese (zh)
Inventor
章巍
熊嘉明
朱敏
段力
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Chengdu Spaceon Electronics Co Ltd
Original Assignee
Chengdu Spaceon Electronics Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Chengdu Spaceon Electronics Co Ltd filed Critical Chengdu Spaceon Electronics Co Ltd
Priority to CN201410760462.3A priority Critical patent/CN104468014A/en
Publication of CN104468014A publication Critical patent/CN104468014A/en
Pending legal-status Critical Current

Links

Landscapes

  • Synchronisation In Digital Transmission Systems (AREA)

Abstract

The invention discloses a method for improving time synchronization precision under a complex network environment. The method mainly solves the problems that synchronization precision of an existing network time synchronization method can not meet requirements of engineering projects and in a serious case, master equipment and slave equipment can not be synchronized normally. The method includes the first step that that a master clock and a slave clock extract timestamps of multiple moments respectively; the second step that unlink delay and downlink delay are measured, and an uplink time delay threshold value and a downlink time delay threshold value are obtained through a time delay detection algorithm; the third step that the timestamps corresponding to the moments beyond the time delay threshold values are removed; the fourth step that precise network time delay is figured out through a time synchronization algorithm and an asymmetrical time delay compensation algorithm; the fifth step that the time of the master clock and the time of the slave clock are synchronized by the utilization of the time synchronization algorithm. The method is suitable for any network time synchronization algorithm, and by the adoption of the method, the time synchronization precision and stability can be greatly improved.

Description

The method of timing tracking accuracy is improved under complex network environment
Technical field
Improve the method for timing tracking accuracy under the present invention relates to complex network environment, belong to Time Synchronization Network technical field.
Background technology
Along with information technology and network technology extensive use, consistent at intrasystem all devices semaphore request.Such as satellite launch and TT&C system, air management system, social co-action system and banking system etc.These application to the consistency of distributed system internal clock and accuracy requirement very high, the generation of any mistake all may cause very serious consequence.
Network time synchronization is based on TCP/IP technology, conventional network time synchronization adopts master-salve clock pattern, as NTP and PTP etc., as shown in Figure 1, usual master clock record sends synchronization point T1, the moment T2 of the sync message that master clock sends is received from clock log, after some clock cycle, from clock transmitting time sync message again, delivery time T3, the time of reception of master clock time of reception message is T4, and then the T4 moment informs from clock by master clock, and thus master-salve clock time deviation is offset=((T2-T1)-(T4-T3))/2.
By the impact that communication network transmission blocks, in practical application there is delay problem when network congestion in most of switching equipment, the propagation delay time sent and receive is also unequal, the factors such as the complicated time delay of Internet Transmission is changeable all can direct influence time synchronization accuracy, the synchronization accuracy of existing network time synchronization algorithm can not meet engineering project requirement, and time serious, even master-slave equipment cannot normal synchronized.
Summary of the invention
The present invention is directed to the shake of network complexity changeable, up-downgoing time delay is inconsistent, the method of timing tracking accuracy is improved under providing complex network environment, the synchronization accuracy mainly solving existing network time synchronization algorithm can not meet engineering project requirement, and time serious, even master-slave equipment cannot the problem of normal synchronized.
To achieve these goals, the technical solution used in the present invention is as follows:
Improve the method for timing tracking accuracy under complex network environment, comprise the steps:
(1) master-salve clock extracts the timestamp in multiple moment respectively;
(2) measure up-downgoing time delay, and draw up-downgoing time delay threshold values by time delay detection algorithm, reject and exceed timestamp corresponding to time delay threshold values;
Usual network time synchronization algorithm basis is that the time delay of requirement uplink downlink is symmetrical, and in actual application, uplink downlink transmits asymmetry often, when namely the transmission delay of uplink downlink is unequal, wherein descends line delay D1=T2-T1, upper line delay D2=T4-T3, when network environment is very complicated, through multihop routing or switch, general D1 and D2 in the uncertain situation of synchronizing network flow is also unequal, in calculating D1 and D2 process, the own value of D1 and D2 changes greatly, direct employing filtering algorithm can not obtain good effect, need to obtain less value in relative time delay in transmitting procedure, therefore need to find network delay threshold values, weed out the timestamp that abnormal time delay is corresponding, but network environment is constantly change in sampling process, so time delay threshold values is not fixing, adaptive time delay threshold values is obtained by adopting abnormal time delay detection algorithm, specific practice is as follows:
(21) set up two sliding window sequences for N, then gather respectively uplink time delay ..., ... and descending time delay ..., ..., respectively equalization is carried out to the sliding time window of up-downgoing time delay; Namely following process is done:
with
wherein i=1,2,3 ... N
wherein i=1,2,3 ... N
(22) to the sequence models fitting after equalization obtain sequence ..., ... and ..., ...;
wherein i=1,2,3 ... N
wherein i=1,2,3 ... N
Wherein , for model constants.
(23) up-downgoing time delay threshold values is calculated;
Uplink time delay threshold values: (N)=;
Uplink time delay threshold values: (N)=;
Wherein=and=;
(3) rejecting exceedes timestamp corresponding to time delay threshold values, and concrete steps are:
Extract timestamp corresponding to normal time delay and carry out delay compensation, when > uplink time delay threshold values or the descending time delay threshold values of >, then abandoning this group T1, T2, T3, T4 value.
(4) accurate network delay is calculated according to Time synchronization algorithm and asymmetric delay compensation algorithm, concrete steps are: when up-downgoing time delay is all less than corresponding threshold values, smoothing algorithm after filtering again, and asymmetric compensation of delay is carried out to it thus obtains relatively accurate network delay Offset=((T2-T1)-(T4-T3))/2+ (D2-D1)/2.
(5) utilize Time synchronization algorithm, offset is brought into time synchronized computing formula, thus realize master-salve clock time synchronized.
Further, described measurement up-downgoing time delay is carried out in network delay measurement module; Described draw up-downgoing time delay threshold values and reject exceed timestamp corresponding to time delay threshold values and carry out at network delay threshold values computing module; Described step (4) is carried out in network delay compensating module.
Compared with prior art, the present invention has following beneficial effect:
(1) the present invention is on existing Time synchronization algorithm basis, proposes simple and effective way, and automatic measurement & calculation network delay threshold values, obtains metastable timestamp, and compensating network time delay and master-salve clock deviation.
(2) the present invention realizes on the basis of not revising original hardware device, can greatly improve timing tracking accuracy and stability.
Accompanying drawing explanation
Fig. 1 is network time synchronization flow chart of the present invention.
Fig. 2 is the flow chart improving timing tracking accuracy under complex network environment of the present invention.
Embodiment
Below in conjunction with drawings and Examples, the invention will be further described, and embodiments of the present invention include but not limited to the following example.
Shown in composition graphs 1, according to time deviation computing formula in Time synchronization algorithm be: offset=((T2-T1)-(T4-T3))/2, this formula requires that master-salve clock up-downgoing network delay is symmetrical, if consider the asymmetric impact on system time synchronization of up-downgoing network delay, then time deviation offset=((T2-T1)-(T4-T3))/2+ T, wherein T is the time deviation that asymmetric time delay causes.
Embodiment
In conjunction with above content, as shown in Figure 2, the method of timing tracking accuracy is improved under complex network environment, the present embodiment proposes time delay detection algorithm and draws adaptive network time delay threshold values, and the time deviation that asymmetric time delay causes compensates, obtain relatively stable and timestamp accurately, comprise the steps:
(1) master-salve clock extracts the timestamp of T1, T2, T3, T4 respectively;
(2) according to lower line delay D1=T2-T1; Upper line delay D2=T4-T3, calculates respective time delay respectively;
(3) time delay detection algorithm is utilized to draw up-downgoing time delay threshold values;
Usual network time synchronization algorithm basis is that the time delay of requirement uplink downlink is symmetrical, and in actual application, uplink downlink transmits asymmetry often, when namely the transmission delay of uplink downlink is unequal, wherein descends line delay D1=T2-T1, upper line delay D2=T4-T3, when network environment is very complicated, through multihop routing or switch, general D1 and D2 in the uncertain situation of synchronizing network flow is also unequal, in calculating D1 and D2 process, the own value of D1 and D2 changes greatly, direct employing filtering algorithm can not obtain good effect, need to obtain less value in relative time delay in transmitting procedure, therefore need to find network delay threshold values, weed out the timestamp that abnormal time delay is corresponding, but network environment is constantly change in sampling process, so time delay threshold values is not fixing, adaptive time delay threshold values is obtained by adopting abnormal time delay detection algorithm, specific practice is as follows:
(21) set up two sliding window sequences for N, then gather respectively uplink time delay ..., ... and descending time delay ..., ..., respectively equalization is carried out to the sliding time window of up-downgoing time delay; Namely following process is done:
with
wherein i=1,2,3 ... N
wherein i=1,2,3 ... N
(22) to the sequence models fitting after equalization obtain sequence ..., ... and ..., ...;
wherein i=1,2,3 ... N
wherein i=1,2,3 ... N
Wherein , for model constants.
(23) up-downgoing time delay threshold values is calculated;
Uplink time delay threshold values: (N)=;
Uplink time delay threshold values: (N)=;
Wherein=and=;
(4) rejecting exceedes timestamp corresponding to time delay threshold values, and concrete steps are:
Extract timestamp corresponding to normal time delay and carry out delay compensation, when > uplink time delay threshold values or the descending time delay threshold values of >, then abandoning this group T1, T2, T3, T4 value.
(5) accurate network delay is calculated according to Time synchronization algorithm and asymmetric delay compensation algorithm, concrete steps are: when up-downgoing time delay is all less than corresponding threshold values, smoothing algorithm after filtering again, and asymmetric compensation of delay is carried out to it thus obtains relatively accurate network delay Offset=((T2-T1)-(T4-T3))/2+ (D2-D1)/2.
(6) utilize Time synchronization algorithm, offset is brought into time synchronized computing formula, thus realize master-salve clock time synchronized.The present invention is applicable to all-network Time synchronization algorithm, and Time synchronization algorithm is existing maturation and meets the algorithm of certain standard, does not repeat at this.
The present invention also comprises following functional module:
Network delay measurement module: primary responsibility calculates up-downgoing time delay, and utilizes time delay detection algorithm to draw up-downgoing time delay threshold values;
Network delay filtering module: utilize latency measurement module to obtain up-downgoing time delay threshold values, when up-downgoing time delay exceedes respective time delay threshold values, then abandon this group T1, T2, T3, T4 timestamp;
Network delay compensating module: calculate master-salve clock deviation accurately by Time synchronization algorithm and delay compensation algorithm, thus master-salve clock time synchronized.
According to above-described embodiment, just the present invention can be realized well.What deserves to be explained is; under prerequisite based on said structure design, for solving same technical problem, even if some making on the invention are without substantial change or polishing; the essence of the technical scheme adopted is still the same with the present invention, therefore it also should in protection scope of the present invention.

Claims (5)

1. improve the method for timing tracking accuracy under complex network environment, it is characterized in that, comprise the steps:
(1) master-salve clock extracts the timestamp in multiple moment respectively;
(2) measure up-downgoing time delay, and draw up-downgoing time delay threshold values by time delay detection algorithm;
(3) rejecting exceedes timestamp corresponding to time delay threshold values;
(4) accurate network delay is calculated according to Time synchronization algorithm and asymmetric delay compensation algorithm;
(5) utilize Time synchronization algorithm, make master-salve clock time synchronized.
2. improve the method for timing tracking accuracy under complex network environment according to claim 1, it is characterized in that, described measurement up-downgoing time delay is carried out in network delay measurement module; Described draw up-downgoing time delay threshold values and reject exceed timestamp corresponding to time delay threshold values and carry out at network delay threshold values computing module; Described step (4) is carried out in network delay compensating module.
3. improve the method for timing tracking accuracy under complex network environment according to claim 2, it is characterized in that, the computational process of described up-downgoing time delay threshold values is as follows:
(21) set up two sliding window sequences for N, then gather respectively uplink time delay ..., ... and descending time delay ..., ..., respectively equalization is carried out to the sliding time window of up-downgoing time delay;
(22) to the sequence models fitting after equalization obtain sequence ..., ... and ..., ...;
(23) up-downgoing time delay threshold values is calculated;
Uplink time delay threshold values: (N)=;
Uplink time delay threshold values: (N)=;
Wherein=and=.
4. under complex network environment according to claim 3, improve the method for timing tracking accuracy, it is characterized in that, the detailed process of described step (3) and (4) is: extract timestamp corresponding to normal time delay and carry out delay compensation, when > uplink time delay threshold values or the descending time delay threshold values of >, then abandon this group T1, T2, T3, T4 value; When up-downgoing time delay is all less than corresponding threshold values, smoothing algorithm after filtering again, and asymmetric compensation of delay is carried out to it, thus obtain relatively accurate network delay Offset=((T2-T1)-(T4-T3))/2+ (D2-D1)/2.
5. under complex network environment according to claim 4, improve the method for timing tracking accuracy, it is characterized in that, described step (5) makes the concrete steps of master-salve clock time synchronized to be: offset is brought into time synchronized computing formula, thus realize master-salve clock time synchronized.
CN201410760462.3A 2014-12-12 2014-12-12 Method for improving time synchronization precision under complex network environment Pending CN104468014A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN201410760462.3A CN104468014A (en) 2014-12-12 2014-12-12 Method for improving time synchronization precision under complex network environment

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN201410760462.3A CN104468014A (en) 2014-12-12 2014-12-12 Method for improving time synchronization precision under complex network environment

Publications (1)

Publication Number Publication Date
CN104468014A true CN104468014A (en) 2015-03-25

Family

ID=52913465

Family Applications (1)

Application Number Title Priority Date Filing Date
CN201410760462.3A Pending CN104468014A (en) 2014-12-12 2014-12-12 Method for improving time synchronization precision under complex network environment

Country Status (1)

Country Link
CN (1) CN104468014A (en)

Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN105553594A (en) * 2015-12-09 2016-05-04 沈阳东软医疗***有限公司 PET (Positron Emission Computed Tomography) clock synchronization method and device
WO2017063450A1 (en) * 2015-10-15 2017-04-20 中兴通讯股份有限公司 Timestamp filtering method and apparatus
CN107483402A (en) * 2017-07-12 2017-12-15 瑞斯康达科技发展股份有限公司 A kind of clock synchronizing method and equipment
CN107548567A (en) * 2015-05-21 2018-01-05 安德鲁无线***有限公司 Synchronous multiple input/multiple output signal in the telecommunication system
CN109005557A (en) * 2018-09-26 2018-12-14 南京中兴新软件有限责任公司 A kind of time delay symmetry measurement method, device and system
CN110266420A (en) * 2019-04-29 2019-09-20 北京达佳互联信息技术有限公司 Clock synchronizing method, clock synchronization apparatus and computer readable storage medium
WO2022078318A1 (en) * 2020-10-15 2022-04-21 华为技术有限公司 Clock synchronization method and related apparatus

Cited By (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US11825433B2 (en) 2015-05-21 2023-11-21 Andrew Wireless Systems Gmbh Synchronizing multiple-input/multiple-output signals in distributed antenna systems
CN107548567A (en) * 2015-05-21 2018-01-05 安德鲁无线***有限公司 Synchronous multiple input/multiple output signal in the telecommunication system
US11071079B2 (en) 2015-05-21 2021-07-20 Andrew Wireless Systems Gmbh Synchronizing multiple-input/multiple-output signals in distributed antenna systems
CN107548567B (en) * 2015-05-21 2020-10-27 安德鲁无线***有限公司 Synchronizing multiple input/multiple output signals in a telecommunications system
WO2017063450A1 (en) * 2015-10-15 2017-04-20 中兴通讯股份有限公司 Timestamp filtering method and apparatus
CN106603183A (en) * 2015-10-15 2017-04-26 中兴通讯股份有限公司 Timestamp filtering method and device
CN106603183B (en) * 2015-10-15 2019-11-15 中兴通讯股份有限公司 A kind of timestamp filter method and device
CN105553594A (en) * 2015-12-09 2016-05-04 沈阳东软医疗***有限公司 PET (Positron Emission Computed Tomography) clock synchronization method and device
CN105553594B (en) * 2015-12-09 2018-02-16 沈阳东软医疗***有限公司 A kind of PET clock synchronizing methods and device
CN107483402B (en) * 2017-07-12 2019-12-06 瑞斯康达科技发展股份有限公司 Clock synchronization method and equipment
CN107483402A (en) * 2017-07-12 2017-12-15 瑞斯康达科技发展股份有限公司 A kind of clock synchronizing method and equipment
CN109005557A (en) * 2018-09-26 2018-12-14 南京中兴新软件有限责任公司 A kind of time delay symmetry measurement method, device and system
CN110266420A (en) * 2019-04-29 2019-09-20 北京达佳互联信息技术有限公司 Clock synchronizing method, clock synchronization apparatus and computer readable storage medium
WO2022078318A1 (en) * 2020-10-15 2022-04-21 华为技术有限公司 Clock synchronization method and related apparatus

Similar Documents

Publication Publication Date Title
CN104468014A (en) Method for improving time synchronization precision under complex network environment
CN101252429B (en) Method for enhancing clock synchronization accuracy in distributed network system
CN102638324B (en) Method and device for realizing precise time synchronization
CN103888237B (en) A kind of method and device for realizing synchronizing clock time
CN106603183B (en) A kind of timestamp filter method and device
CN101425865B (en) Method and system for synchronizing clock of transmission network as well as subordinate clock side entity
CN103532652B (en) A kind of time synchronism apparatus and method
JP2013106329A (en) Communication apparatus
CN106357362B (en) A kind of method for synchronizing time, device and PTP system
CN102932905A (en) Method and system for realizing self-compensation 1588 link asynchronous time delay
CN102082653B (en) Method, system and device for clock synchronization
CN103368721A (en) Computing method for transparent clock in time-triggered Ethernet
CN102315985A (en) Time synchronization precision test method for intelligent device adopting IEEE1588 protocols
CN108599888A (en) A kind of distributed network clock synchronizing system
US9270607B2 (en) Method and devices for packet selection
CN109150357A (en) The method for synchronizing time of hybrid bus based on RS485 and Ethernet
CN102546142A (en) Frequency synchronous method of transparent clock and storage and forward method of synchronous messages
CN103929293A (en) Asymmetrically-delayed time synchronization method and system
CN103378993A (en) Slave clock monitoring method based on PTP
CN105207767B (en) A kind of PTP master clocks and the method and device from Frequency Synchronization between clock
CN107809295B (en) A kind of cross-platform time synchronism apparatus and method
CN105743598A (en) Industrial Ethernet clock synchronization method and system
Ronen et al. Enhanced synchronization accuracy in IEEE1588
CN105703892A (en) Method of realizing PTP nanosecond precision based on hardware time stamp
CN103532693A (en) Time synchronizing device and method

Legal Events

Date Code Title Description
C06 Publication
PB01 Publication
SE01 Entry into force of request for substantive examination
RJ01 Rejection of invention patent application after publication
RJ01 Rejection of invention patent application after publication

Application publication date: 20150325