CN104465613A - Chip interconnection structure and interconnection process thereof - Google Patents
Chip interconnection structure and interconnection process thereof Download PDFInfo
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- CN104465613A CN104465613A CN201310744788.2A CN201310744788A CN104465613A CN 104465613 A CN104465613 A CN 104465613A CN 201310744788 A CN201310744788 A CN 201310744788A CN 104465613 A CN104465613 A CN 104465613A
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Abstract
The invention discloses a chip interconnection structure and an interconnection process of the chip interconnection structure. A thermocompression bonding technology is combined, the metal characteristic of copper is fully utilized, interconnection between two chips or among more chips is achieved, and a metal structure is arranged, so that the two chips can be connected optically and can be connected and electrically. Bonding among the chips is firmer and high in strength. The whole interconnection process is relatively simple and suitable for production and application on a large scale. Besides, except for a protection structure covering rasters and waveguide, no gap exists among the chips. In this way, the free optical transmission space among the rasters only ranges from 2 micrometers to 4 micrometers, and the optical loss caused by light diffusion is reduced to a certain degree. The two rasters are preferably of a focal type raster structure, the optical loss generated in the light transmission process can be better reduced, and meanwhile the better longitudinal and transverse error tolerance can be obtained.
Description
Technical field
The present invention relates to technical field of photo communication, specifically relate to a kind of chip interconnect structure and interconnection technology thereof.
Background technology
Along with the progress of science and technology, more and more chip with difference in functionality pours in the life of people, mutual contact mode between chip and chip is also more and more various, and wherein turning-over of chip light UNICOM technology can be described as and carry out a technology the most common in the middle of interconnected all technological means between chip and chip.
As shown in Figure 1, after two chip (1,2) UNICOMs, the UNICOM of light can between the grating 4 in two chips, be realized.Usually the mode adopting indium solder reflow to weld in prior art realizes the UNICOM between two chips.As a kind of flux-free reflux technique method based on indium bump that patent documentation application publication number is CN102064120A, it discloses substrate metal, passivation layer opening, enclosure cavity thicken, indium plating salient point, the coated indium bump of plating silver layer, the interconnection technology step such as salient point backflow.The chip interconnect structure produced according to this kind of interconnection technology has a kind of ability of good self-aligned, and often also can obtain good alignment error, and obtains preferably efficiency of transmission, is relatively applicable to quick large-scale production.
Because the fusing point of indium projection itself is low, projection can be produced in interconnected heating process, form higher height (generally between 30 microns to 50 microns), as shown in Figure 2 just for the indium projection of one of them chip is through adding the thermogenetic indium pellet 3 with certain altitude.Time like this by two chip interconnect, between two chips, tight combination can not be accomplished, as shown in Figure 1, can cause between two chips, there are some indium pellets 3 with certain altitude due to the existence of projection.Compare according to Fig. 1 and Fig. 2 known, the distance between two gratings will be caused like this to increase, when realizing light UNICOM, light path strengthens, and increases optical loss.The interconnection technology of carrying out by this way can have the optical loss of 6-7dB in actual transmissions.
Summary of the invention
For this reason, technical problem to be solved by this invention is that chip interconnect structure of the prior art can produce larger optical loss in transmitting procedure, thus proposes a kind of a kind of chip interconnect structure and interconnection technology thereof of the optical loss that can reduce in transmitting procedure.
For solving the problems of the technologies described above, the invention provides following technical scheme:
A kind of chip interconnect structure, comprising:
First chip and the second chip, and by the metal structure of described first chip and described second chip UNICOM;
Wherein said first chip and described second chip include optical chip portion and electronics connecting portion, and described optical chip portion comprises grating and waveguide, and light signal transmits between two gratings; Described electronics connecting portion comprises and carries out by described metal structure the electronic device that connects.
Described metal structure is metallic copper further.
Two gratings are one-dimensional grating structure further.
Two gratings are focusing type optical grating construction further.
Described first chip and described second chip all also comprise the operator guards covered in grating and waveguide further.
Distance further between two gratings is 2-4um.
Distance further between described metal structure and waveguide is greater than 3-4um.
A kind of chip interconnect technique, comprises the steps:
S1: apply layer of metal structure at the upper surface of the first chip and the second chip;
S2: described first chip is relative with the upper surface of described second chip, ensures that the metal structure of two chips fits;
S3: the chip of two in described step S2 is carried out thermocompression bonding, completes the interconnected of two chips.
Described metal structure is metallic copper further.
Described thermocompression bonding is not less than at cleanliness factor in the dust free room of 1000 and carries out further.
The temperature of described thermocompression bonding is 300 DEG C-500 DEG C further.
The temperature of described thermocompression bonding is 400 DEG C further.
The pressure of described thermocompression bonding is 2000-5000mbar further.
Technique scheme of the present invention has the following advantages compared to existing technology:
(1) a kind of chip interconnect structure of the present invention and interconnection technology thereof, combine thermocompression bonding technology, and it is interconnected that the metallic character taking full advantage of copper realizes two chips or multiple chip, metal structure be arranged so that two chips not only can realize optics connect, can also realize electricity connect.Bonding between chip is relatively more firm, and intensity is high; And whole interconnection technology is relatively simple, processes without the need to edge, be relatively applicable to large-scale production application.
(2) a kind of chip interconnect structure of the present invention and interconnection technology thereof, except covering the operator guards on grating and waveguide, can not have interval between chip and chip.Optical transport distance between such grating and grating only has 2 microns to 4 microns, and the optical loss caused due to diffusion optical guide just obtains reduction to a certain degree.
(3) a kind of chip interconnect structure of the present invention and interconnection technology thereof, two described gratings are preferably focusing type optical grating construction, not only can reduce the optical loss in optical transmission process preferably, also can obtain good vertical and horizontal fault tolerance simultaneously.
Accompanying drawing explanation
In order to make content of the present invention be more likely to be clearly understood, below according to a particular embodiment of the invention and by reference to the accompanying drawings, the present invention is further detailed explanation, wherein
Fig. 1 is chip interconnect structural representation of the prior art;
Fig. 2 is the indium pellet enlarged diagram in chip interconnect structure of the prior art;
Fig. 3 is the chip interconnect structural representation described in a kind of embodiment;
Fig. 4 is the lightray propagation schematic diagram in one-dimensional grating structure;
Fig. 5 is the lightray propagation schematic diagram in focusing type optical grating construction;
Chip interconnect process chart described in a kind of embodiment of Fig. 6.
In figure, Reference numeral is expressed as: 1-first chip, 2-second chip, 3-indium pellet, 4-grating,
5-waveguide, 6-electronic device.
Embodiment
embodiment 1
A kind of chip interconnect structure described in the present embodiment, as shown in Figure 3, comprising:
First chip 1 and the second chip 2, and by the metal structure of described first chip 1 and described second chip 2 UNICOM.
Wherein said first chip 1 and described second chip 2 include optical chip portion and electronics connecting portion, and described optical chip portion comprises grating 4 and waveguide 5, and light signal transmits between two gratings 4; Described electronics connecting portion comprises and carries out by described metal structure the electronic device 6 that connects.
Described metal structure is preferably metallic copper.Those skilled in the art should know, the selection of described metal structure material includes but not limited to metallic copper, and other metal can also be selected, because metallic copper is electricity main at present connect medium, and use metallic copper as bonding medium, can procedure of processing be simplified.By metal structure be arranged so that two chips not only can realize optics connect, can also realize electricity connect.So place preferably uses metallic copper, but other apparent metals are replaced also within the protection range of the present embodiment.
A kind of chip interconnect structure described in the present embodiment, lays layer of metal copper by the upper surface of chip described in each, then completes the interconnected of two chips by thermocompression bonding technology.The laying of described metallic copper needs the smooth of the upper surface ensureing whole chip, and design parameter needs to set in conjunction with the actual size of concrete chip, but the final purpose realized is that the slitless connection of guarantee two chips is interconnected.And the present embodiment not only can complete the interconnected of two chips, also the interconnected of multiple chip can be completed, as long as namely the crystalline substrates of described first chip 1 itself is enough wide, the metallic copper that described first chip 1 is laid enough wide just can on described first chip 1 interconnected multiple chip.Those skilled in the art should know, and the quantity of described chip interconnect, not for limiting the present embodiment, carries out the interconnected also within the protection range of the present embodiment of multiple chip according to actual needs.
Two gratings are one-dimensional grating structure.Optical mode generally will be broadened gradually by a kind of very long tapered waveguide in tiny waveguiding structure one end by this optical signal in transmitting procedure, then optical mode near normal is spread out by grating, and its lightray propagation process as shown in Figure 4.Wherein said optical mode is the various parameters of the light signal corresponding when meeting respective phase condition in transmitting procedure of light signal.This tapered waveguide is often very long, such as in silicon photosystem, often need more than 300 microns, and in the integrated optics system of other low index contrast degree, this tapered waveguide part then needs longer, those skilled in the art should know, and are not repeating herein.By adopting the chip interconnect structure of one-dimensional grating structure in silicon optical communication, 3dB error range, at positive and negative 8 microns, has good longitudinal error tolerance.
Described first chip and described second chip all also comprise the silicon dioxide operator guards covered in grating and waveguide.Distance preferably between two gratings is 2-4um.Simultaneously in order to ensure less being interfered in optical signal transmission process, the distance preferably between described metal structure and waveguide is 3-4um.Those skilled in the art should know, and the thickness difference due to the operator guards of chip surface can cause the change of above data, and any apparent data variation is all within the protection range of the present embodiment.
A kind of chip interconnect structure described in the present embodiment, except covering the operator guards on grating and waveguide, can not have interval between chip and chip.Optical transport distance between such grating and grating only has 2 microns to 4 microns, and the optical loss caused due to diffusion optical guide just obtains reduction to a certain degree.
embodiment 2
The present embodiment is the improvement carried out on the basis of embodiment 1, and the difference of itself and embodiment 1 is the one-dimensional grating structure by focusing type optical grating construction alternative embodiment 1, and namely two gratings are focusing type optical grating construction, and the communication process of its light signal as shown in Figure 5.
No matter grating in described chip interconnect structure is one-dimensional grating structure or focusing type optical grating construction, and all very outstanding in the performance of longitudinal error, 3dB error range is at positive and negative 8 microns.If but one-dimensional grating structure width is not high, its lateral error tolerance is often very low.If but one-dimensional grating structure width is higher, lateral error tolerance can corresponding improve, but this structure needs the tapered waveguide grown very much to realize the transmission of low-loss rate, like this can increase again the area occupied of optics greatly.
And focusing type optical grating construction is brief than one-dimensional grating structure comparison, even longer its length of focusing type optical grating construction is also all within 30 microns, also just tapered waveguide is not needed to be increased by optical mode.Also therefore focusing type optical grating construction can have good performance in lateral error tolerance, and 3dB error range is at positive and negative 5-10 microns.The chip interconnect structure of i.e. focusing type not only can reduce the optical loss in optical transmission process preferably, also can obtain good vertical and horizontal fault tolerance simultaneously.The design size of focusing type grating is also greatly reduce for one-dimensional grating, is conducive to the size saving of chip design.
embodiment 3
A kind of chip interconnect technique, as shown in Figure 6, comprises the steps:
S1: apply layer of metal structure at the upper surface of the first chip and the second chip;
S2: described first chip is relative with the upper surface of described second chip, ensures that the metal structure of two chips fits;
S3: the chip of two in described step S2 is carried out thermocompression bonding, completes the interconnected of two chips.
Described metal structure is preferably metallic copper.Those skilled in the art should know, the selection of described metal structure material includes but not limited to metallic copper, and other metal can also be selected, because metallic copper is electricity main at present connect medium, and use metallic copper as bonding medium, can procedure of processing be simplified.By metal structure be arranged so that two chips not only can realize optics connect, can also realize electricity connect.So place preferably uses metallic copper, but other apparent metals are replaced also within the protection range of the present embodiment.
Thermocompression bonding technology is applied in Electronic Packaging field usually, mainly makes bonding medium generation deformation, by the bonding pattern carried out the regulation and control of time, temperature, pressure by high-temperature heating.Due to this technology relative maturity, so place is not specifically addressed thermocompression bonding technology, those skilled in the art should know.But application thermocompression bonding technology is applied not yet to some extent in chip interconnect field, especially adopts metallic copper as thermocompression bonding medium.A kind of chip interconnect technique described in the present embodiment, combines thermocompression bonding technology, and the metallic character taking full advantage of copper to realize two chips or multiple chip interconnected.Metal structure be arranged so that two chips not only can realize optics connect, can also realize electricity connect.Bonding between chip is relatively more firm, and bulk strength is high; And whole interconnection technology is relatively simple, be relatively applicable to large-scale production application.
Described thermocompression bonding is not less than in the dust free room of 1000 at cleanliness factor to be carried out.In order to ensure the slitless connection between chip, needing some micronic dusts of as far as possible avoiding being mingled with between chip and impurity, selecting the effect of its thermocompression bonding of environment that cleanliness factor is higher better.
The temperature of described thermocompression bonding is preferably 300 DEG C-500 DEG C.The temperature of more preferably described thermocompression bonding is 400 DEG C.The pressure of described thermocompression bonding is 2000-5000mbar.Because heating is at about 400 degree, and the fusing point of metallic copper is at 1084 DEG C, the temperature of described thermocompression bonding can not make the pattern of metallic copper change, and also would not produce projection, can ensure that the slitless connection of two chips is interconnected.So just can be arranged so that two chips not only can realize optics and connect by metal structure, electricity can also be realized and connect.And the present embodiment not only can complete the interconnected of two chips, also the interconnected of multiple chip can be completed, as long as namely the crystalline substrates of described first chip itself is enough wide, the metallic copper that described first chip is laid enough wide just can on described first chip interconnected multiple chip.Those skilled in the art should know, and the quantity of described chip interconnect, not for limiting the present embodiment, carries out the interconnected also within the protection range of the present embodiment of multiple chip according to actual needs.
Obviously, above-described embodiment is only for clearly example being described, and the restriction not to execution mode.For those of ordinary skill in the field, can also make other changes in different forms on the basis of the above description.Here exhaustive without the need to also giving all execution modes.And thus the apparent change of extending out or variation be still among the protection range of the invention.
Claims (13)
1. a chip interconnect structure, is characterized in that, comprising:
First chip and the second chip, and by the metal structure of described first chip and described second chip UNICOM;
Wherein said first chip and described second chip include optical chip portion and electronics connecting portion, and described optical chip portion comprises grating and waveguide, and light signal transmits between two gratings; Described electronics connecting portion comprises and carries out by described metal structure the electronic device that connects.
2. chip interconnect structure according to claim 1, is characterized in that:
Described metal structure is metallic copper.
3. chip interconnect structure according to claim 1 and 2, is characterized in that:
Two gratings are one-dimensional grating structure.
4. chip interconnect structure according to claim 1 and 2, is characterized in that:
Two gratings are focusing type optical grating construction.
5., according to the arbitrary described chip interconnect structure of claim 1-4, it is characterized in that:
Described first chip and described second chip all also comprise the operator guards covered in grating and waveguide.
6., according to the arbitrary described chip interconnect structure of claim 1-5, it is characterized in that:
Distance between two gratings is 2-4um.
7. according to the arbitrary described chip interconnect structure of claim 1-6: it is characterized in that:
Distance between described metal structure and waveguide is greater than 3-4um.
8. a chip interconnect technique, is characterized in that, comprises the steps:
S1: apply layer of metal structure at the upper surface of the first chip and the second chip;
S2: described first chip is relative with the upper surface of described second chip, ensures that the metal structure of two chips fits;
S3: the chip of two in described step S2 is carried out thermocompression bonding, completes the interconnected of two chips.
9. chip interconnect technique according to claim 8, is characterized in that:
Described metal structure is metallic copper.
10. chip interconnect technique according to claim 8 or claim 9, is characterized in that:
Described thermocompression bonding is not less than in the dust free room of 1000 at cleanliness factor to be carried out.
11.-10 arbitrary described chip interconnect techniques according to Claim 8, is characterized in that:
The temperature of described thermocompression bonding is 300 DEG C-500 DEG C.
12.-11 arbitrary described chip interconnect techniques according to Claim 8, is characterized in that:
The temperature of described thermocompression bonding is 400 DEG C.
13.-12 arbitrary described chip interconnect techniques according to Claim 8, is characterized in that:
The pressure of described thermocompression bonding is 2000-5000mbar.
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| CN111151317A (en) * | 2020-01-17 | 2020-05-15 | 上海新微技术研发中心有限公司 | Method for manufacturing grating waveguide multi-micro-channel chip |
| CN111157728A (en) * | 2020-01-17 | 2020-05-15 | 上海新微技术研发中心有限公司 | Optical waveguide microfluid detection system |
| CN111244120A (en) * | 2020-01-17 | 2020-06-05 | 上海新微技术研发中心有限公司 | Method for manufacturing grating waveguide microfluid chip based on CMOS image sensing |
| CN111229340A (en) * | 2020-01-17 | 2020-06-05 | 上海新微技术研发中心有限公司 | Method for manufacturing grating waveguide microfluid chip |
| US11171006B2 (en) | 2019-12-04 | 2021-11-09 | International Business Machines Corporation | Simultaneous plating of varying size features on semiconductor substrate |
| US11239167B2 (en) | 2019-12-04 | 2022-02-01 | International Business Machines Corporation | Cu—Cu bonding for interconnects on bridge chip attached to chips and packaging substrate |
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