CN103871912B - 半导体工艺及其结构 - Google Patents

半导体工艺及其结构 Download PDF

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CN103871912B
CN103871912B CN201210559290.4A CN201210559290A CN103871912B CN 103871912 B CN103871912 B CN 103871912B CN 201210559290 A CN201210559290 A CN 201210559290A CN 103871912 B CN103871912 B CN 103871912B
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layer
section
buffer layer
underbump metallization
buffer
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CN103871912A (zh
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施政宏
谢永伟
王凯亿
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Chipbond Technology Corp
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Abstract

本发明是有关于一种半导体工艺，其包含下列步骤：提供硅基板，该硅基板具有导接垫及保护层；形成第一种子层，该第一种子层具有第一区段及第二区段；形成第一光阻层；形成第一缓冲层,该第一缓冲层具有接合部及包埋部；移除该第一光阻层；移除该第一种子层的该第二区段以形成第一凸块下金属层；形成支撑层于该保护层及该第一缓冲层，该第一凸块下金属层具有第一环壁，该第一缓冲层具有第二环壁，该支撑层包覆该第一环壁、该第二环壁及该包埋部；以及形成导接部且覆盖该第一缓冲层的该接合部。

Description

半导体工艺及其结构
技术领域
本发明是有关于一种半导体工艺，特别是有关于一种可加强结构强度的半导体工艺。
背景技术
如图1所示，现有习知半导体结构200包含有硅基板210、凸块下金属层220及焊球230，该硅基板210具有铝垫211及保护层212，该凸块下金属层220电性连接该铝垫211且该焊球230形成于该凸块下金属层220上。当该半导体结构200进行推力测试时，由于该焊球230、该凸块下金属层220与该铝垫211的材质不同，因此会存在明显的结合接口而形成结构强度最脆弱之处，导致该凸块下金属层220容易由该铝垫211剥离甚至损伤该铝垫211而使得该半导体结构200良率下降。
由此可见，上述现有的半导体在产品结构、制造方法与使用上，显然仍存在有不便与缺陷，而亟待加以进一步改进。因此如何能创设一种新的半导体工艺及其结构，亦成为当前业界极需改进的目标。
有鉴于上述现有的半导体存在的缺陷，本发明人基于从事此类产品设计制造多年丰富的实务经验及专业知识，并配合学理的运用，积极加以研究创新，以期创设一种新的半导体工艺及其结构，能够改进一般现有的半导体，使其更具有实用性。经过不断的研究、设计,并经过反复试作样品及改进后，终于创设出确具实用价值的本发明。
发明内容
本发明的主要目的在于，克服现有的半导体存在的缺陷，而提供一种新的半导体工艺及其结构，所要解决的技术问题是使其形成一支撑层于该保护层及该第一缓冲层，该第一凸块下金属层具有一第一环壁，该第一缓冲层具有一第二环壁，该支撑层包覆该第一环壁、该第二环壁及该包埋部；以及形成一导接部且覆盖该第一缓冲层之该接合部，非常适于实用。
本发明的目的及解决其技术问题是采用以下技术方案来实现的。依据本发明提出的一种半导体工艺，其中包含：提供硅基板，该硅基板具有表面、导接垫及保护层，该导接垫形成于该表面，该保护层形成于该表面且覆盖该导接垫，该保护层具有第一开口，该第一开口显露该导接垫；形成第一种子层于该保护层及该导接垫，该第一种子层具有第一区段及位于该第一区段外侧的第二区段；形成第一光阻层于该第一种子层，该第一光阻层形成有第一开槽以显露该第一区段；形成第一缓冲层于该第一开槽，该第一缓冲层覆盖该第种子层的该第一区段，该第一缓冲层具有接合部及包埋部；移除该第一光阻层以显露该第一种子层的该第二区段；移除该第一种子层的该第二区段以使该第一区段形成第一凸块下金属层；形成支撑层于该保护层及该第一缓冲层，该支撑层具有第二开口且该第二开口显露该第一缓冲层的该接合部，其中该第一凸块下金属层具有第一环壁，该第一缓冲层具有第二环壁,该支撑层包覆该第一凸块下金属层之该第一环壁、该第一缓冲层的该第二环壁及该包埋部；以及
形成导接部于该第二开口且覆盖该第一缓冲层的该接合部。
本发明的目的及解决其技术问题还可采用以下技术措施进一步实现。
前述的半导体工艺,其特征在于该导接部包含有第二凸块下金属层、第二缓冲层及焊料层,该第二凸块下金属层覆盖该第一缓冲层之该接合部，该第二缓冲层覆盖该第二凸块下金属层，该焊料层覆盖该第二缓冲层。
前述的半导体工艺，其特征在于该支撑层具有顶面，该第二凸块下金属层覆盖该顶面。
前述的半导体工艺,其特征在于形成该导接部的工艺包含下列步骤：形成第二种子层于该支撑层并覆盖该第一缓冲层，该第二种子层具有第三区段及位于该第三区段外侧的第四区段；形成第二光阻层于该第二种子层,该第二光阻层形成有第二开槽以显露该第三区段；形成该第二缓冲层于该第二开槽,该第二缓冲层覆盖该第二种子层之该第三区段；形成该焊料层于该第二缓冲层；移除该第二光阻层以显露该第二种子层的该第四区段；及移除该第二种子层的该第四区段以使该第三区段形成该第二凸块下金属层。
前述的半导体工艺，其特征在于在移除该第二种子层的该第四区段的步骤后，另包含有回焊该焊料层的步骤。
前述的半导体工艺，其特征在于该第一种子层的材质选自于钛铜合金或钛钨铜合金其中之一。
前述的半导体工艺，其特征在于该支撑层的材质选自于聚酰亚胺(Polyimide,PI)、聚对苯撑苯并二嗯唑（Poly-p-phenylene benzo-bisoxazazole,PBO）或苯环丁烯(Benezocy-clobutene,BCB)其中之一。
前述的半导体工艺，其特征在于该第二种子层的材质选自于钛铜合金或钛钨铜合金其中之一。
前述的半导体工艺，其特征在于该第一缓冲层的材质选自于铜或镍其中之一。
前述的半导体工艺，其特征在于该第二缓冲层的材质选自于铜、镍或铜镍合金其中之一。
前述的半导体工艺，其特征在于该第一缓冲层的该接合部具有一接合面，该第二凸块下金属层具有抵接边，该抵接边接触该接合面。
本发明的目的及解决其技术问题还采用以下技术方案来实现。依据本发明提出的一种半导体结构，其中包含：硅基板，其具有表面、导接垫及保护层，该导接垫形成于该表面，该保护层形成于该表面且覆盖该导接垫，该保护层具有第一开口，该第一开口显露该导接垫；第一凸块下金属层，其覆盖该保护层及该导接垫，该第一凸块下金属层具有第一环壁；第一缓冲层，其形成于该第一凸块下金属层，该第一缓冲层具有接合部、包埋部及第二环壁；支撑层，其形成于该保护层、该第一凸块下金属层及该第一缓冲层，该支撑层具有第二开口且该第二开口显露该第一缓冲层之该接合部，该支撑层包覆该第一凸块下金属层之该第一环壁、该第一缓冲层的该第二环壁及该包埋部；以及导接部，其形成于该第二开口且覆盖该第一缓冲层的该接合部。
本发明的目的及解决其技术问题还可采用以下技术措施进一步实现。
前述的半导体结构,其特征在于该导接部包含有第二凸块下金属层、第二缓冲层及焊料层，该第二凸块下金属层形成于该第二开口，且覆盖该第一缓冲层的该接合部，该第二缓冲层覆盖该第二凸块下金属层，该焊料层覆盖该第二缓冲层。
前述的半导体结构，其特征在于该支撑层具有顶面，该第二凸块下金属层覆盖该顶面。
前述的半导体结构，其特征在于该第一凸块下金属层的材质选自于钛铜合金或钛钨铜合金其中之一。
前述的半导体结构，其特征在于该支撑层的材质选自于聚酰亚胺(Polyimide,PI)、聚对苯撑苯并二嗯唑（Poly-p-phenylene benzo-bisoxazazole,PBO）或苯环丁烯(Benezocy-clobutene,BCB)其中之一。
前述的半导体结构，其特征在于该第二凸块下金属层的材质选自于钛铜合金或钛钨铜合金其中之一。
前述的半导体结构，其特征在于该第一缓冲层的材质选自于铜或镍其中之一。
前述的半导体结构，其特征在于该第二缓冲层的材质选自于铜、镍或铜镍合金其中之一。
前述的半导体结构，其特征在于该第一缓冲层的该接合部具有一接合面，该第二凸块下金属层具有一抵接边，该抵接边接触该接合面。
本发明与现有技术相比具有明显的优点和有益效果。由以上技术方案可知,本发明的主要技术内容如下：提供一种半导体工艺，其包含下列步骤：提供硅基板，该硅基板具有表面、导接垫及保护层，该导接垫形成于该表面，该保护层形成于该表面且覆盖该导接垫，该保护层具有第一开口，该第一开口显露该导接垫；形成第一种子层于该保护层及该导接垫，该第一种子层具有第一区段及位于该第一区段外侧的第二区段；形成第一光阻层于该第一种子层，该第一光阻层形成有第一开槽以显露该第一区段；形成第一缓冲层于该第一开槽，该第一缓冲层覆盖该第一种子层的该第一区段，该第一缓冲层具有接合部及包埋部；移除该第一光阻层以显露该第一种子层的该第二区段；移除该第一种子层的该第二区段以使该第一区段形成第一凸块下金属层；形成一支撑层于该保护层及该第一缓冲层,该支撑层具有第二开口且该第二开口显露该第一缓冲层的该接合部，其中该第一凸块下金属层具有第一环壁，该第一缓冲层具有第二环壁，该支撑层包覆该第一凸块下金属层的该第一环壁、该第一缓冲层的该第二环壁及该包埋部；以及形成导接部于该第二开口且覆盖该第一缓冲层之该接合部。
借由上述技术方案，本发明半导体工艺及其结构具有下列优点及有益效果：由于该支撑层包覆该第一凸块下金属层的该第一环壁、该第一缓冲层的该第二环壁及该包埋部,且该第一缓冲层覆盖该第一凸块下金属层，因此该半导体结构进行推力试验时，可防止该第一凸块下金属层由该导接垫剥离或损伤该导接垫，因而提高该半导体结构的良率。
上述说明仅是本发明技术方案的概述，为了能够更清楚了解本发明的技术手段，而可依照说明书的内容予以实施，并且为了让本发明的上述和其它目的、特征和优点能够更明显易懂，以下特举较佳实施例，并配合附图,详细说明如下。
附图说明
图1是现有习知半导体结构示意图。
图2是依据本发明的一较佳实施例，一种半导体工艺之流程图。
图3A至图3I是依据本发明的一较佳实施例，该半导体工艺的截面示意图。
图4是依据本发明的一较佳实施例，一种导接部工艺流程图。
图5A至图5E是依据本发明的一较佳实施例，该导接部工艺的截面示意图。
【主要元件符号说明】
10：提供硅基板
11：形成第一种子层
12：形成第一光阻层
13：形成第一缓冲层
14：移除该第一光阻层
15：移除该第一种子层
16：形成支撑层
17：形成导接部
20：形成第二种子层
21：形成第二光阻层
22：形成该第二缓冲层
23：形成该焊料层
24：移除该第二光阻层
25：移除该第二种子层
100：半导体结构
110：硅基板 111：表面
112：导接垫 113：保护层
113a：第一开口
120：第一凸块下金属层 121：第一环壁
120’：第一种子层 120’a：第一区段
120’b：第二区段 130：第一缓冲层
131：接合部 131a：接合面
132：包埋部 133：第二环壁
140：支撑层 141：第二开口
142：顶面
150：导接部 151：第二凸块下金属层
151a：抵接边 151’：第二种子层
151’a：第三区段 151’b：第四区段
152：第二缓冲层 153：焊料层
153a：弧状表面
200：半导体结构
210：硅基板 211：铝垫
212：保护层 220：凸块下金属层
230：焊球
O1：第一开槽 O2：第二开槽
P1：第一光阻层 P2：第二光阻层
具体实施方式
为更进一步阐述本发明为达成预定发明目的所采取的技术手段及功效,以下结合附图及较佳实施例，对依据本发明提出的半导体工艺及其结构其具体实施方式、结构、方法、步骤、特征及其功效，详细说明如后。
请参阅图2及图3A至图3I,其本发明的一较佳实施例，一种半导体工艺包含下列步骤：首先,请参阅图2的步骤10及图3A,提供硅基板110，该硅基板110具有表面111、导接垫112及保护层113,该导接垫112形成于该表面111,该保护层113形成于该表面111且覆盖该导接垫112，该保护层113具有第一开口113a，该第一开口113a显露该导接垫112；接着，请参阅图2的步骤11及图3B，形成第一种子层120’于该保护层113及该导接垫112，该第一种子层120’具有第一区段120’a及位于该第一区段120’a外侧的第二区段120’b，该第一种子层120’的材质选自于钛铜合金或钛钨铜合金其中之一；之后，请参阅图2的步骤12及图3C，形成第一光阻层P1于该第一种子层120’，该第一光阻层P1形成有第一开槽O1以显露该第一区段120’a；接着，请参阅图2的步骤13及图3D，形成第一缓冲层130于该第一开槽O1，该第一缓冲层130覆盖该第一种子层120’的该第一区段120’a，且该第一缓冲层130具有接合部131及包埋部132，该第一缓冲层130的材质选自于铜或镍其中之一；之后，请参阅图2的步骤14及图3E，移除该第一光阻层P1以显露该第一种子层120’的该第二区段120’b；接着，请参阅图2的步骤15及图3F，移除该第一种子层120’的该第二区段120’b以使该第一区段120’a形成第一凸块下金属层120；之后，请参阅图2的步骤16及图3G，形成支撑层140于该保护层113及该第一缓冲层130，该支撑层140具有第二开口141且该第二开口141显露该第一缓冲层130的该接合部131，其中该第一凸块下金属层120具有第一环壁121，该第一缓冲层130具有第二环壁133，该支撑层140包覆该第一凸块下金属层120的该第一环壁121、该第一缓冲层130的该第二环壁133及该包埋部132，该支撑层140的材质选自于聚酰亚胺(Polyimide,PI)、聚对苯撑苯并二嗯唑（Poly-p-phenylene benzo-bisoxazazole,PBO）或苯环丁烯(Benezocy-clobutene,BCB)其中之一；接着，请参阅图2的步骤17及图3H，形成导接部150于该第二开口141且覆盖该第一缓冲层130的该接合部131，较佳地,在本实施例中,该导接部150包含有第二凸块下金属层151、第二缓冲层152及焊料层153，该第二凸块下金属层151覆盖该第一缓冲层130的该接合部131，且该支撑层140具有顶面142，该第二凸块下金属层151覆盖该顶面142，在本实施例中，该第二凸块下金属层151具有抵接边151a，该第一缓冲层130的该接合部131具有接合面131a，该抵接边151a接触该接合面131a，该第二缓冲层152覆盖该第二凸块下金属层151，该焊料层153覆盖该第二缓冲层152。
此外，请参阅图4及图5A至图5E，在本实施例中，形成该导接部150的工艺包含下列步骤：首先，请参阅图4的步骤20及图5A，形成第二种子层151’于该支撑层140并覆盖该第一缓冲层130，该第二种子层151’具有第三区段151’a及位于该第三区段151’a外侧的第四区段151’b，该第二种子层151’的材质选自于钛铜合金或钛钨铜合金其中之一；接着，请参阅图4的步骤21及图5B,形成第二光阻层P2于该第二种子层151’，该第二光阻层P2形成有第二开槽O2以显露该第三区段151’a；之后，请参阅图4的步骤22及图5C，形成该第二缓冲层152于该第二开槽O2，该第二缓冲层152覆盖该第二种子层151’的该第三区段151’a，该第二缓冲层152的材质选自于铜、镍或铜镍合金其中之一；接着，请参阅图4的步骤23及图5D，形成该焊料层153于该第二缓冲层152；之后，请参阅图4的步骤24及图5E,移除该第二光阻层P2以显露该第二种子层151’的该第四区段151’b；接着，请参阅图4的步骤25及图3H，移除该第二种子层151’的该第四区段151’b以使该第三区段151’a形成该第二凸块下金属层151，并形成半导体结构100；最后，请参阅图3I，回焊该焊料层153以使该焊料层153形成有弧状表面153a。由于该半导体结构100的该支撑层140包覆该第一凸块下金属层120的该第一环壁121、该第一缓冲层130的该第二环壁133及该包埋部132，且该第一缓冲层130覆盖该第一凸块下金属层120，该第二凸块下金属层151的该抵接边151a接触该接合部131的该接合面131a，因此该半导体结构100进行推力试验时，可防止该第一凸块下金属层120由该导接垫112剥离或损伤该导接垫112，因而提高该半导体结构100的良率。
请再参阅图3H，其本发明的一种半导体结构100，其至少包含有硅基板110、第一凸块下金属层120、第一缓冲层130、支撑层140以及导接部150，该硅基板110具有表面111、导接垫112及保护层113，该导接垫112形成于该表面111，该保护层113形成于该表面111且覆盖该导接垫112，该保护层113具有第一开口113a，该第一开口113a显露该导接垫112，该第一凸块下金属层120覆盖该保护层113及该导接垫112，该第一凸块下金属层120的材质选自于钛铜合金或钛钨铜合金其中之一，该第一凸块下金属层120具有第一环壁121，该第一缓冲层130形成于该第一凸块下金属层120，该第一缓冲层130的材质选自于铜或镍其中之一，该第一缓冲层130具有接合部131、包埋部132及第二环壁133，该支撑层140形成于该保护层113、该第一凸块下金属层120及该第一缓冲层130，该支撑层140的材质选自于聚酰亚胺(Polyimide,PI)、聚对苯撑苯并二嗯唑（Poly-p-phenylene benzo- bisoxazazole,PBO）或苯环丁烯(Benezocy-clobutene,BCB)其中之一，该支撑层140具有第二开口141及顶面142，且该第二开口141显露该第一缓冲层130的该接合部131，该支撑层140包覆该第一凸块下金属层120的该第一环壁121、该第一缓冲层130的该第二环壁133及该包埋部132，该导接部150形成于该第二开口141且覆盖该第一缓冲层130之该接合部131，在本实施例中，该导接部150包含有第二凸块下金属层151、第二缓冲层152及焊料层153，该第二凸块下金属层151形成于该第二开口141，且覆盖该第一缓冲层130的该接合部131，该第二凸块下金属层151的材质选自于钛铜合金或钛钨铜合金其中之一，该第二缓冲层152覆盖该第二凸块下金属层151，该第二缓冲层152的材质选自于铜、镍或铜镍合金其中之一，该焊料层153覆盖该第二缓冲层152,该第二凸块下金属层151覆盖该支撑层140的该顶面142。较佳地，在本实施例中,该第一缓冲层130的该接合部131具有接合面131a，该第二凸块下金属层151具有抵接边151a，该抵接边151a接触该接合面131a。
以上所述，仅是本发明的较佳实施例而已，并非对本发明作任何形式上的限制，虽然本发明已以较佳实施例揭露如上，然而并非用以限定本发明,任何熟悉本专业的技术人员,在不脱离本发明技术方案范围内，当可利用上述揭示的方法及技术内容作出些许的更动或修饰为等同变化的等效实施例，但凡是未脱离本发明技术方案的内容，依据本发明的技术实质对以上实施例所作的任何简单修改、等同变化与修饰，均仍属于本发明技术方案的范围内。

Claims (11)

1.一种半导体工艺，其特征在于包含：
提供硅基板，该硅基板具有表面、导接垫及保护层，该导接垫形成于该表面，该保护层形成于该表面且覆盖该导接垫，该保护层具有第一开口，该第一开口显露该导接垫；
形成第一种子层于该保护层及该导接垫，该第一种子层具有第一区段及位于该第一区段外侧的第二区段；
形成第一光阻层于该第一种子层，该第一光阻层形成有第一开槽以显露该第一区段；
形成第一缓冲层于该第一开槽，该第一缓冲层覆盖该第一种子层的该第一区段，该第一缓冲层具有接合部及包埋部；
移除该第一光阻层以显露该第一种子层的该第二区段；
移除该第一种子层的该第二区段,在该第一区段形成第一凸块下金属层；
形成支撑层于该保护层及该第一缓冲层，该支撑层具有第二开口且该第二开口显露该第一缓冲层的该接合部，其中该第一凸块下金属层具有第一环壁，该第一缓冲层具有第二环壁，该支撑层包覆该第一凸块下金属层的该第一环壁、该第一缓冲层的该第二环壁及该包埋部；以及
形成导接部于该第二开口且覆盖该第一缓冲层的该接合部。
2.如权利要求1所述的半导体工艺，其特征在于该导接部包含有第二凸块下金属层、第二缓冲层及焊料层，该第二凸块下金属层覆盖该第一缓冲层的该接合部，该第二缓冲层覆盖该第二凸块下金属层，该焊料层覆盖该第二缓冲层。
3.如权利要求2所述的半导体工艺，其特征在于该支撑层具有顶面，该第二凸块下金属层覆盖该顶面。
4.如权利要求2所述的半导体工艺，其特征在于形成该导接部的工艺包含下列步骤：
形成第二种子层于该支撑层并覆盖该第一缓冲层，该第二种子层具有第三区段及位于该第三区段外侧的第四区段；
形成第二光阻层于该第二种子层，该第二光阻层形成有第二开槽以显露该第三区段；
形成该第二缓冲层于该第二开槽，该第二缓冲层覆盖该第二种子层的该第三区段；
形成该焊料层于该第二缓冲层；
移除该第二光阻层以显露该第二种子层的该第四区段；及
移除该第二种子层的该第四区段以使该第三区段形成该第二凸块下金属层。
5.如权利要求4所述的半导体工艺，其特征在于在移除该第二种子层的该第四区段的步骤后，另包含有回焊该焊料层的步骤。
6.如权利要求1所述的半导体工艺，其特征在于该第一种子层的材质选自于钛铜合金或钛钨铜合金其中之一。
7.如权利要求1所述的半导体工艺，其特征在于该支撑层的材质选自于聚酰亚胺、聚对苯撑苯并二嗯唑或苯环丁烯其中之一。
8.如权利要求4所述的半导体工艺，其特征在于该第二种子层的材质选自于钛铜合金或钛钨铜合金其中之一。
9.如权利要求1所述的半导体工艺，其特征在于该第一缓冲层的材质选自于铜或镍其中之一。
10.如权利要求2所述的半导体工艺，其特征在于该第二缓冲层的材质选自于铜、镍或铜镍合金其中之一。
11.如权利要求2所述的半导体工艺，其特征在于该第一缓冲层的该接合部具有一接合面，该第二凸块下金属层具有抵接边，该抵接边接触该接合面。
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