CN102591419A - Blade server mainboard - Google Patents
Blade server mainboard Download PDFInfo
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- CN102591419A CN102591419A CN2011104599827A CN201110459982A CN102591419A CN 102591419 A CN102591419 A CN 102591419A CN 2011104599827 A CN2011104599827 A CN 2011104599827A CN 201110459982 A CN201110459982 A CN 201110459982A CN 102591419 A CN102591419 A CN 102591419A
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Abstract
The invention describes a blade server mainboard comprising eight layers of PCB layers, wherein a first layer, a fourth layer, a fifth layer and an eighth layer are signal layers, a second layer, a third layer, a sixth layer and a seventh layer are digital electric layers or a digital ground layers; the signal layers are used for transmitting a signal for an apparatus on the blade server mainboard, the digital electric layers or the digital ground layers are used for forming a closed loop by combining with the signal layers, thereby providing a returning route for the signal. With the blade server mainboard described in the invention, a PCB laminated structure is simplified, and the cost is saved.
Description
Technical field
The present invention relates to computer realm basically, more specifically, relates to a kind of blade server mainboard.
Background technology
AMD has released the C32 platform product, and this platform is supported 24 nuclear or 6 nuclear Lisbon processors, interconnected employing HT 3.0 bussing techniques between two CPU.Based on the two-way motherboard design of this platform, the design specifications that need provide with reference to AMD realizes two HT buses connections of two CPU on 10 layer circuit boards.Interconnected bussing technique between a kind of CPU of HT bus.Characteristics such as it has two-way, serial, high bandwidth, lowly postpone, point-to-point.Present HT 3.0 agreement regulation bus dominant frequency are up to 3.2GHz, and rising edge and negative edge 1 clock period carry out a data transfer respectively, so maximum transmission rate reaches 6.4GT/s.
A kind of four road server master boards are provided in the prior art; Comprise four processors, memory module, peripheral I/O parts; It is characterized in that; Also comprise the peripheral component interconnect equipment that the peripheral component interconnect bridge chip, South Bridge chip of expansion, the peripheral component interconnect bus through expansion connect, wherein memory module is connected with processor, and peripheral I/O parts are connected with South Bridge chip; Between the processor, between the peripheral component interconnect bridge chip of processor, expansion and the South Bridge chip through ultra transfer bus transmission information.
Above-mentioned prior art has improved the performance of the extensibility, availability of blade server or the like aspect to a certain extent, yet does not improve to PCB (printed circuit board (PCB)) the layer structure of server master board, and lamination is complicated, and cost is higher.
Summary of the invention
More complicated to blade server mainboard lamination of the prior art, the defective that cost is higher the present invention proposes a kind of blade server mainboard, has solved technical matters how to simplify blade server mainboard PCB rhythmo structure.
According to an aspect of the present invention, a kind of blade server mainboard has been described, wherein; Have eight layers of PCB layer; Wherein, ground floor, the 4th layer, layer 5 and the 8th layer are signals layer, and the second layer, the 3rd layer, layer 6 and layer 7 are digital electrical layer or digital stratum; Wherein, The device that said signals layer is used on the said blade server mainboard transmits signal, and said digital electrical layer or digital stratum are used for combining with said signals layer and form the closed-loop path, thereby for said signal return path are provided.
In this blade server mainboard, a CPU and the 2nd CPU, wherein, said ground floor and said the 8th layer are used to transmit DDR3 internal memory signal; Said the 4th layer and said layer 5 are used to transmit the signal between a said CPU and said the 2nd CPU.
In this blade server mainboard, said the 4th layer and said layer 5 are further used for transmitting the signal between a said CPU and the north bridge chips.
In this blade server mainboard, said the 4th layer with said layer 5 be further used for transmitting said DDR3 internal memory signal.
In this blade server mainboard, said the 4th layer and said layer 5 are used for two HT buses through isometric coupling and transmit signal and the signal between a said CPU and the north bridge chips between a said CPU and said the 2nd CPU.
In this blade server mainboard, the thickness of said ground floor is 0.6 Mill, and the thickness of the said second layer is 3.7 Mills; Said the 3rd layer thickness is 4 Mills; Said the 4th layer thickness is 4 Mills, and the thickness of said layer 5 is 28 Mills, and the thickness of said layer 6 is 4 Mills; The thickness of said layer 7 is 4 Mills, and said the 8th layer thickness is 3.7 Mills.
In this blade server mainboard, said pair of HT bus is two 16 bit HT, 3.0 buses.
In this blade server mainboard, said pair of HT bus comprises that a plurality of signal wires are right, and wherein, the length difference of two signal line of each said signal wire centering is all less than 28 Mills.
In this blade server mainboard, belong to distance between the right signal wire of unlike signal line greater than 12 Mills.
In this blade server mainboard, the error in length of 8 bit clock buses in the said blade server mainboard is less than 55 Mills.
Through blade server mainboard described in the invention, simplified the PCB rhythmo structure, provide cost savings.
Other features and advantages of the present invention will be set forth in instructions subsequently, and, partly from instructions, become obvious, perhaps understand through embodiment of the present invention.The object of the invention can be realized through the structure that in the instructions of being write, claims and accompanying drawing, is particularly pointed out and obtained with other advantages.
Description of drawings
Accompanying drawing is used to provide further understanding of the present invention, and constitutes the part of instructions, is used to explain the present invention with embodiments of the invention, is not construed as limiting the invention.In the accompanying drawings:
Fig. 1 shows the PCB rhythmo structure synoptic diagram of blade server mainboard according to an embodiment of the invention.
Fig. 2 shows the cabling scenario of signal wire between a kind of adjacent memory passage and the CPU.
Embodiment
Below in conjunction with accompanying drawing the preferred embodiments of the present invention are described, should be appreciated that preferred embodiment described herein only is used for explanation and explains the present invention, and be not used in qualification the present invention.
Fig. 1 shows the PCB rhythmo structure synoptic diagram of blade server mainboard according to an embodiment of the invention.The shown blade server mainboard of present embodiment has eight layers of PCB rhythmo structure, specifically comprises: layer 100, layer 102, layer 104, layer 106, layer 108, layer 110, layer 112 and layer 114.Wherein, layer 100 is a top layer, and layer 114 is a bottom.In these eight layers; Include signals layer and digital electrical layer or digital stratum, wherein, signals layer is used to transmit signal; Digital electrical layer and digital stratum are used for combining with signals layer and form the closed-loop path, thereby return path are provided for the signal that signals layer transmitted.In above-mentioned eight layers; Layer 100, layer 106, layer 108 and layer 114 are signals layer; Can be used to transmit DDR3 internal memory signal (for example, the CPU Memory Controller Hub being connected with the DIMMS groove) and/or transmit the signal between the CPU, but this signals layer has more than to be limited to and transmits above-mentioned two kinds of signals.In a specific embodiment, layer 100 and layer 114 are used to transmit the signal of DDR3.Layer 106 is used to transmit the signal of DDR3 with layer 108, and is used to transmit the signal between the CPU.In another embodiment, layer 100 and layer 114 are used to transmit the signal of DDR3.Layer 106 108 is used to transmit the signal of DDR3 with layer, and is used to transmit signal and the signal between one of them CPU and the north bridge chips between the CPU.
On blade server mainboard described in the invention, may further include two CPU, be called a CPU and the 2nd CPU.These two CPU interconnect, and one of them CPU is connected with north bridge chips.Like this, layer 106 108 can be used to transmit the signal of DDR3 with layer, and can be used to transmit signal and the signal between a CPU and the north bridge chips between a CPU and the 2nd CPU.
In addition, known like those of ordinary skills, can also have such as layers such as silk-screen (soldermask) layer, plating (plating) layers on the top layer of blade server mainboard with under the bottom.
Through the described blade server mainboard of the foregoing description, reduce to eight layers through the number of plies, thereby reduced cost the PCB lamination.
In one embodiment, can carry out the signal transmission through two HT buses between a CPU and the 2nd CPU and between a CPU and the north bridge chips.Wherein, this pair HT bus is two 16 bit HT, 3.0 buses.Wherein, this pair HT bus satisfies isometric coupling, that is to say, utilizes signal wire in this pair HT bus to transmitting differential signal, thereby the right length of this signal wire is substantially the same.Wherein, the right isometric matching error of this signal wire is less than 28 Mills (that is, length difference is less than 28 Mills), belongs to distance setting between the right signal wire of unlike signal line for greater than three times of dielectric thickness, i.e. 12 Mills.In addition, the length matching error of 8 bit clock buses in the blade server mainboard is limited in ± 55 Mills.
According to the described blade server mainboard of present embodiment,, improved in the stability and the security that the number of plies are reduced under eight layers the situation through controlling the distance between isometric matching error and the signal wire.
Wherein, as shown in Figure 1, the thickness D0 of layer 100 is 0.6 Mill; The thickness D2 of layer 102 is 3.7 Mills, and the thickness D4 of layer 104 is 4 Mills, and the thickness D6 of layer 106 is 4 Mills; The thickness D8 of layer 108 is 28 Mills; The thickness D10 of layer 110 is 4 Mills, and the thickness D12 of layer 112 is 4 Mills, and the thickness D14 of layer 114 is 3.7 Mills.
According to the described blade server mainboard of present embodiment; Through adjusting each layer thickness; In conjunction with the concrete application of each layer, improved the stability of whole blade server mainboard, and under the prerequisite that does not reduce each layer function property, made every layer thickness obtain optimization.
In addition, Fig. 2 is the cabling scenario of signal wire between a kind of adjacent memory passage and the CPU, wherein, and the isometric coupling of not shown signal wire.
The above is merely the preferred embodiments of the present invention, is not limited to the present invention, and for a person skilled in the art, the present invention can have various changes and variation.All within spirit of the present invention and principle, any modification of being done, be equal to replacement, improvement etc., all should be included within protection scope of the present invention.
Claims (10)
1. a blade server mainboard is characterized in that, has eight layers of PCB layer; Wherein, ground floor, the 4th layer, layer 5 and the 8th layer are signals layer, and the second layer, the 3rd layer, layer 6 and layer 7 are digital electrical layer or digital stratum; Wherein, The device that said signals layer is used on the said blade server mainboard transmits signal, and said digital electrical layer or digital stratum are used for combining with said signals layer and form the closed-loop path, thereby for said signal return path are provided.
2. blade server mainboard according to claim 1 is characterized in that, further comprises: a CPU and the 2nd CPU, wherein,
Said ground floor and said the 8th layer are used to transmit DDR3 internal memory signal; And
Said the 4th layer and said layer 5 are used to transmit the signal between a said CPU and said the 2nd CPU.
3. blade server mainboard according to claim 2 is characterized in that, said the 4th layer and said layer 5 also are used to transmit the signal between a said CPU and the north bridge chips.
4. blade server mainboard according to claim 3 is characterized in that, said the 4th layer with said layer 5 also be used to transmit said DDR3 internal memory signal.
5. blade server mainboard according to claim 3; It is characterized in that said the 4th layer and said layer 5 are used for two HT buses through isometric coupling and transmit signal and the signal between a said CPU and the said north bridge chips between a said CPU and said the 2nd CPU.
6. blade server mainboard according to claim 5 is characterized in that, the thickness of said ground floor is 0.6 Mill; The thickness of the said second layer is 3.7 Mills, and said the 3rd layer thickness is 4 Mills, and said the 4th layer thickness is 4 Mills; The thickness of said layer 5 is 28 Mills; The thickness of said layer 6 is 4 Mills, and the thickness of said layer 7 is 4 Mills, and said the 8th layer thickness is 3.7 Mills.
7. blade server mainboard according to claim 5 is characterized in that, said pair of HT bus is two 16 bit HT, 3.0 buses.
8. blade server mainboard according to claim 7 is characterized in that, said pair of HT bus comprises that a plurality of signal wires are right, and wherein, the length difference of two signal line of each said signal wire centering is all less than 28 Mills.
9. blade server mainboard according to claim 8 is characterized in that, belongs to distance between the right signal wire of unlike signal line greater than 12 Mills.
10. blade server mainboard according to claim 9 is characterized in that, the error in length of 8 bit clock buses in the said blade server mainboard is less than 55 Mills.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201110459982.7A CN102591419B (en) | 2011-12-31 | 2011-12-31 | Blade server mainboard |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201110459982.7A CN102591419B (en) | 2011-12-31 | 2011-12-31 | Blade server mainboard |
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| Publication Number | Publication Date |
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| CN102591419A true CN102591419A (en) | 2012-07-18 |
| CN102591419B CN102591419B (en) | 2015-06-17 |
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| CN201110459982.7A Active CN102591419B (en) | 2011-12-31 | 2011-12-31 | Blade server mainboard |
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Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6075423A (en) * | 1997-11-26 | 2000-06-13 | Intel Corporation | Controlling signal trace characteristic impedance via a conductive epoxy layer |
| CN1747620A (en) * | 2004-09-08 | 2006-03-15 | 华为技术有限公司 | Laminated structure of printing circuit board and multi-laminate laminated structure |
| CN200976709Y (en) * | 2006-09-25 | 2007-11-14 | 佛山市顺德区顺达电脑厂有限公司 | Circuit board stack structure capable of suppressing electromagnetic radiation |
| CN201749395U (en) * | 2010-08-04 | 2011-02-16 | 深圳市康迈科技有限公司 | Main board of tablet computer |
| CN201781688U (en) * | 2009-06-16 | 2011-03-30 | 联想(北京)有限公司 | Printed circuit board and computer using same |
-
2011
- 2011-12-31 CN CN201110459982.7A patent/CN102591419B/en active Active
Patent Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6075423A (en) * | 1997-11-26 | 2000-06-13 | Intel Corporation | Controlling signal trace characteristic impedance via a conductive epoxy layer |
| CN1747620A (en) * | 2004-09-08 | 2006-03-15 | 华为技术有限公司 | Laminated structure of printing circuit board and multi-laminate laminated structure |
| CN200976709Y (en) * | 2006-09-25 | 2007-11-14 | 佛山市顺德区顺达电脑厂有限公司 | Circuit board stack structure capable of suppressing electromagnetic radiation |
| CN201781688U (en) * | 2009-06-16 | 2011-03-30 | 联想(北京)有限公司 | Printed circuit board and computer using same |
| CN201749395U (en) * | 2010-08-04 | 2011-02-16 | 深圳市康迈科技有限公司 | Main board of tablet computer |
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| CN102591419B (en) | 2015-06-17 |
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Effective date of registration: 20170213 Address after: 124000 Panjin, Liaoning Province, coastal economic zone in the coastal area of the crown building, building 3018, room 3, Liaoning Patentee after: Dawning Information Systems (Liaoning) Co., Ltd. Address before: 300384 Tianjin city Xiqing District Huayuan Industrial Zone (outer ring) Haitai Huake Street No. 15 1-3 Patentee before: Sugon Information Industry Co., Ltd. |