CN102368090A

CN102368090A - Debugger of digital circuit

Info

Publication number: CN102368090A
Application number: CN2011103100718A
Authority: CN
Inventors: 邹雅娴
Original assignee: WUXI DOMA DESIGN CREATIVE CO Ltd
Current assignee: WUXI DOMA DESIGN CREATIVE CO Ltd
Priority date: 2011-10-13
Filing date: 2011-10-13
Publication date: 2012-03-07

Abstract

The invention relates to a debugger of a digital circuit, wherein the debugger is a system that is designed for realizing debugging of a digital circuit. The debugger comprises an FPGA logical analysis module, a dual-port RAM, an FPGA waveform generation module, a bridging chip and a microprocessor. Moreover, the FPGA logical analysis module is used for analyzing a signal waveform; the dual-port RAM is used for intermediary between the FPGA and the microprocessor; the FPGA waveform generation module is used for generating a specific waveform; the bridging chip is used for realizing a communication circuit between the microprocessor and a PC computer; and the microprocessor is used for controlling an FPGA module and an interaction between the FPGA module and the PC host. According to the invention, the debugger has advantages of flexibility, high efficiency, utility, and high cost performance; besides, the user operation is simple.

Description

The digital circuit debugger

Technical field

The present invention relates to the intelligence instrument field, be specifically related to a kind of digital circuit debugger.

Technical background

During the test digital display circuit, often need observe the multi-path digital signal waveform, to analyze its logical relation by logic analyser.Yet existing logic analyser not only costs an arm and a leg, and also is difficult to popularize and promote.For this reason, designed a Simple and Easy Logic Tester based on field programmable gate array (FPGA) and microprocessor.It has complete function, and is cheap, advantage that can real-time analysis 8 way word signals, so practical value is very high.In Design of Automatic Control System, debugging and electronic experiment process, run into signals such as the sine wave that needs different frequency, square wave, triangular wave as signal source through regular meeting.Conventional method adopts the astable multivibrator of discrete component more, adds waveform generators such as formation sine, rectangle, triangle such as integrating circuit then according to concrete needs.Sort signal generator reference frequency output is narrow and circuit design parameter is more loaded down with trivial details; The change of its frequency size often need realize the use of different frequency scope through the switching of hardware circuit; Complex circuit designs; Therefore operation inconvenience designed a simple and easy digital signal generator based on FPGA and microprocessor.

Summary of the invention

For addressing the above problem, the present invention has adopted FPGA to combine with microprocessor, can realize difunctional, promptly can be as logic analyser, can make that the digital circuit debugging is convenient as signal generator again, quick.

For achieving the above object; The technical scheme that the present invention adopts is: a kind of digital circuit debugger; It is characterized in that: comprise fpga logic analysis module, dual port RAM, FPGA waveform generating module, bridging chip, microprocessor, described dual port RAM, FPGA waveform generating module, bridging chip are connected with microprocessor;

Described fpga logic analysis module links to each other with dual port RAM, is used for the circuit logic functional analysis;

Described dual port RAM links to each other with microprocessor, is used for metadata cache;

Described FPGA waveform generating module links to each other with microprocessor, is used for the generation of waveform;

Described bridging chip adopts the method for UART-USB to realize the communication mode conversion;

The data that described microprocessor RL analysis module transmits, and send bridging chip to.

First preferred version of the present invention is it is characterized in that: the fpga logic analysis module comprises XC3S250.

Second preferred version of the present invention is that it is characterized in that: dual port RAM comprises CY7C026.

The 3rd preferred version of the present invention is it is characterized in that: FPGA waveform generating module comprises FLEX10K100.

The 4th preferred version of the present invention is that it is characterized in that: bridging chip comprises CP2102.

The 5th preferred version of the present invention is it is characterized in that: described microprocessor comprises S3C6410.

Technical conceive of the present invention is: this circuit debugging device can grasp certain from treat examining system

The shape information of a little digital signals sends the PC main frame to through USB interface then, and the PC main frame is presented at the mode of the data that received through oscillogram on the screen, and the user can utilize wave form analysis to treat the state of examining system.The content of configuration comprises the triggering mode of logic analyser, the sampling clock of logic analyser, the sampling channel of logic analyser.The waveform generator module can produce square wave, sine wave, and triangular wave, waveform frequency and dutycycle can be passed through the main frame setting.

Technical advantage of the present invention: operation interface is simple, and the equipment applicability can be carried out logic analysis by force again can be as waveform generator.

Below in conjunction with accompanying drawing and embodiment the present invention is further described.

Description of drawings

Fig. 1 is the present embodiment entire block diagram.

Fig. 2 is that the present embodiment logic analysis module is connected synoptic diagram with dual port RAM.

Fig. 3 is that the present embodiment microprocessor is connected synoptic diagram with dual port RAM.

Fig. 4 is that the present embodiment microprocessor is connected synoptic diagram with the waveform generating module.

Fig. 5 is that the present embodiment microprocessor is connected synoptic diagram with bridging chip.

Fig. 6 is present embodiment logic analysis subprogram figure.

Fig. 7 is present embodiment waveform generation subprogram figure.

Embodiment

With reference to shown in Figure 1.The present invention has adopted with the ARM11 processor as CPU, and the function of CPU comprises the control that logic analysis and waveform take place, the transfer of data, the processing of man-machine interaction.Described dual port RAM, FPGA waveform generating module, bridging chip are connected with microprocessor;

Fig. 2 is that the present embodiment logic analysis module is connected synoptic diagram with dual port RAM.The core voltage of XC3S250 chip is 1.2V, and I/O voltage is 3.3V.In order to reduce the complicacy of power supply design, adopt the power source special chip to supply power.In order to realize communicating by letter of FPGA and microprocessor, can adopt dual port RAM as intermediary.This chip has two operation ports, left port and right output port, and each port has 4 control signals, CE, OE, RW, BUSY, wherein the BUSY signal is used to prevent the operating collision of two ports, the CE signal is the port gating signal, this end

When mouth was high level, corresponding port was under an embargo, and OE is used for the output of control data mouth, when

When OE was high level, data port became high-impedance state.

Fig. 3 is that the present embodiment microprocessor is connected synoptic diagram with dual port RAM.The right port of dual port RAM is connected on the GPIO of microprocessor.Whether dual port RAM is used for detecting another port and simultaneously same address space is being operated for each port provides a BUSY signal.

Fig. 4 is that the present embodiment microprocessor is connected synoptic diagram with the waveform generating module.Waveform generator control circuit among the FPGA is provided with several special register stored waveform parameters through external control signal and data-signal decision waveform occurring mode among the FPGA.D/A converter is responsible for converting digital signal to simulating signal, behind filtering circuit, exports, and the upper frequency limit of output waveform is relevant with the slewing rate of D/A device.

Fig. 5 is that the present embodiment microprocessor is connected synoptic diagram with bridging chip.Adopt the method for UART-USB bridging chip to realize that microprocessor communicates by letter with PC, wherein UART interface TXD and the RXD of CP2102 are connected respectively to the UART module reuse pin of microprocessor.

Fig. 6 is present embodiment logic analysis subprogram figure.FPGA is mainly according to control word control triggering mode, sampling clock and sampling channel etc., and the signal that samples write in the dual port RAM.The course of work of logic analysis is exactly the process of data acquisition, storage, triggering, demonstration; Because it adopts digital storage technique; Can data collection task and demonstration work separately be carried out, also can carry out simultaneously, in case of necessity; Data to storage can show repeatedly, are beneficial to analysis and research to problem.

Fig. 7 is present embodiment waveform generation subprogram figure.Part takes place waveform also is according to control

The system word is provided with the parameters of waveform, after input parameter finishes, sends startup command by microprocessor, and waveform begins to produce.

Claims

1. digital circuit debugger, it is characterized in that: comprise fpga logic analysis module, dual port RAM, FPGA waveform generating module, bridging chip, microprocessor, described dual port RAM, FPGA waveform generating module, bridging chip are connected with microprocessor;

2. a kind of digital circuit debugger according to claim 1, it is characterized in that: the fpga logic analysis module comprises XC3S250.

3. a kind of digital circuit debugger according to claim 1, it is characterized in that: dual port RAM comprises CY7C026.

4. a kind of digital circuit debugger according to claim 1 is characterized in that: FPGA waveform generating module comprises FLEX10K100.

5. a kind of digital circuit debugger according to claim 1, it is characterized in that: bridging chip comprises CP2102.

6. a kind of digital circuit debugger according to claim 1, it is characterized in that: described microprocessor comprises S3C6410.