CN102099919A - 具有用于栅极的贯通本体通路的纵型mosfet - Google Patents
具有用于栅极的贯通本体通路的纵型mosfet Download PDFInfo
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- CN102099919A CN102099919A CN2009801272585A CN200980127258A CN102099919A CN 102099919 A CN102099919 A CN 102099919A CN 2009801272585 A CN2009801272585 A CN 2009801272585A CN 200980127258 A CN200980127258 A CN 200980127258A CN 102099919 A CN102099919 A CN 102099919A
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- longitudinal type
- mosfet
- type mosfet
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Abstract
MOSFET功率芯片包括第一和第二纵型MOSFET。第一纵型MOSFET包括半导体本体,所述半导体本体具有限定源极的第一表面以及限定漏极的第二表面;栅极结构,所述栅极结构形成于所述半导体本体内并且靠近所述第二表面。通路大致垂直于所述两个表面并且电耦合到所述第一表面和所述栅极结构。第二纵型MOSFET包括半导体本体,所述半导体本体具有限定源极的第一表面以及限定漏极的第二表面;以及栅极结构,所述栅极结构形成于所述半导体本体内并且靠近所述第一表面。所述第一纵型MOSFET的所述第一表面和所述第二纵型MOSFET的所述第二表面大致共面,导电罐大致围绕所述纵型MOSFET并且将所述第一纵型MOSFET的所述第一表面短接到所述第二纵型MOSFET的所述第二表面。
Description
背景技术
MOSFET(金属氧化物半导体场效应晶体管)是特定类型的场效应晶体管(FET),其通过电子地改变沟道的宽度来工作,电荷载体沿着该沟道流动。沟道越宽,该装置的传导性越好。电荷载体在源极进入沟道并且通过漏极离开。沟道的导电性通过在栅极上的电压来控制,该栅极在物理上位于源极和漏极之间并且通过金属氧化物的薄层而与沟道隔离。
现在,在首字母缩略词MOSFET中的“金属”通常是误称,因为先前的金属栅极材料现在通常是多晶硅(多晶体的硅)的层。也就是说,直到1980s(此时,多晶硅由于其形成自对准栅极的能力而变得流行)以前,铝通常用作栅极材料。IGFET涉及更为普遍的术语含义绝缘栅场效应晶体管,且几乎与MOSFET同义,虽然其可指代具有不是氧化物的栅极绝缘体的FET。当指代具有多晶硅栅极的装置时,有人偏好于使用“IGFET”,但是多数人仍指代其为MOSFET,本文采用该习惯。
MOSFET可按照两者方式来工作。第一方式已知为耗尽模式,其中当在栅极上没有电压时,沟槽展现其最大导电性。当栅极上的电压增加(正向或负向,取决于沟道由P型或N型半导体材料制成)时,沟道的导电性降低。MOSFET可操作的第二方式称为增强模式,其中当在栅极上没有电压时,在效果上没有沟道且装置不导电。通过向栅极施加电压来产生沟道。栅极电压越大,装置的导电性越好。
MOSFET具有优于常规面结型FET或JFET的一些优势。由于栅极与沟道电绝缘,在栅极与沟道之间没有电流流动,与栅极电压无关(只要其不变得足够大,以致金属氧化物层物理上断开)。因此,MOSFET实践上具有无限大的阻抗。这使得MOSFET可用于大功率应用。该装置还十分适合于高速开关应用。
大功率MOSFET是设计成处理大功率的特定类型的MOSFET。与其它功率半导体装置相比(例如,绝缘栅双极晶体管(IGBT)和晶闸管等)其主要优势在于高变换速度、在低压时的良好效率以及使得容易驱动的隔离栅。大功率MOSFET与其低功率对应部件(横向MOSFET)共享其操作原理。大功率MOSFET最广泛地用于低压(即,小于200V)开关。在大多数功率源中可发现DC-DC转换器和低压马达控制器。
图1是示出了基本单元的现有技术的垂直扩散金属氧化物半导体(VDMOS)的截面图。单元通常十分小(从几个微米至数十个微米宽),功率MOSFET通常包括数千个这种单元。截面图描述了其中源极位于漏极上面的装置的“纵型配置”,从而导致当晶体管处于接通状态时电流主要在竖直方向上。如本文所使用的,“纵型MOSFET”和“功率MOSFET”可互换地使用。VDMOS中的“扩散”是指这样的制造工艺:P井通过P和N+区域的双扩散工艺获得。
应当注意的是,存在许多类型的功率MOSFET和功率MOSFET设计,并且图1的示例性MOSFET是该许多个中的简单MOSFET。图2以示意性的方式描述了一般化的功率MOSFET 9。通常为硅的半导体本体B在一侧具有源极S并且在另一侧具有漏极D。栅极G设置在源极S侧上。当然,栅极G与本体B绝缘,并且连接到通常数千个MOSFET单元的栅极。类似地,源极S连接到MOSFET单元的源极,漏极D连接到MOSFET单元的漏极。
降压调节器是DC-DC开关转换器拓扑,其采用未调节输入电压并且产生较低调节输出电压。通过将输入电压分流到串联连接开关(晶体管)来实现较低输出电压,该开关向平均电感器和电容器施用脉冲。在MOSFET降压调节器中,使用两个MOSFET,其中用于“下侧”MOSFET的漏极和“上侧”MOSFET的源极彼此连接到一起。
图3是用于降压调节器的现有技术MOSFET电路10的示意图。电路10包括串联连接的第一MOSFET 12和第二MOSFET 14。也就是说,第一MOSFET 12的源极S耦合到第二MOSFET 14的漏极D,以形成已知为“相引脚(phase)”的节点。
图4描述了根据现有技术的MOSFET 12和14的可能物理连接。由于纵型MOSFET 12和14在硅背侧上具有漏极,因此这些MOSFET均不能接触相同的导电表面或“板”,因为这会使得其漏极短路。这需要将漏极分别附连到两个分离的板P1和P2上,该两个板彼此相互电隔离。多焊接丝线20将MOSFET 12的源极S耦合至MOSFET 14的漏极D。因此,在该示例中板P2用作相引脚。
半导体的封装变得日益重要。封装用于以许多方式优化半导体性能,包括热驱散、屏蔽和互连简化。例如,在以引用的方式结合到本文中的Standing等人的美国专利No.6,624,522、No.6,930,397和No.7,285,866中教导了适用于MOSFET的封装件。Standing的装置包括金属罐,其可接收MOSFET。MOSFET定向成使得其漏极面向罐的底部,并且漏极通过导电环氧树脂、焊料等等的层电连接到该底部。MOSFET的边缘与罐壁间隔开,MOSFET的边缘与罐壁之间的空间用绝缘层填充。
图5描述了根据现有技术的MOSFET的罐式封装件。罐16封装功率MOSFET 18,其中该漏极D电耦合至导电金属罐16。虽然通常来说是有利的,但是该罐封装件不十分适合于封装如图3阐述互连的功率MOSFET对。这是由于在导电板(即,导电金属罐16的底部)上短接漏极的前述问题。
通过阅读下述说明并研究下述附图,现有技术的这些限制以及其它限制对于本领域技术人员将显而易见。
发明内容
在通过示例而非限制的方式阐述的实施例中,纵型MOSFET包括半导体本体,所述半导体本体具有限定源极的大致平面第一表面以及限定漏极的大致平面第二表面。第一表面和所述第二表面彼此大致平行但不共面。栅极形成于所述半导体本体内靠近所述第二表面并且耦合到通路,所述通路形成于半导体本体内并且至少部分地位于所述第一表面与所述第二表面之间。
在通过示例而非限制的方式阐述的实施例中,MOSFET功率芯片包括第一纵型MOSFET和第二纵型MOSFET。第一纵型MOSFET包括半导体本体,所述半导体本体具有限定源极的第一表面以及限定漏极的第二表面。栅极结构形成于所述半导体本体内并且靠近所述第二表面,通路位于半导体本体内并且大致垂直于所述第一表面和所述第二表面。所述通路具有电耦合到所述第一表面的第一端和电耦合到所述栅极结构的第二端。
第二纵型MOSFET包括半导体本体,所述半导体本体具有限定源极的第一表面以及限定漏极的第二表面;以及栅极结构,所述栅极结构形成于所述半导体本体内并且靠近所述第一表面。所述第一纵型MOSFET的所述第一表面和所述第二纵型MOSFET的所述第二表面大致共面,导电材料将所述第一纵型MOSFET的所述第一表面耦合到所述第二纵型MOSFET的所述第二表面。
在通过示例而非限制的方式阐述的实施例中,MOSFET功率芯片包括第一纵型MOSFET和第二纵型MOSFET。第一纵型MOSFET包括半导体本体,所述半导体本体具有限定源极的第一表面以及限定漏极的第二表面;以及栅极结构,栅极结构形成于所述半导体本体内并且靠近所述第二表面。通路形成于半导体本体内并且大致垂直于所述第一表面和所述第二表面。所述通路具有电耦合到所述第一表面的第一端和电耦合到所述栅极结构的第二端。
第二纵型MOSFET包括半导体本体,所述半导体本体具有限定源极的第一表面以及限定漏极的第二表面;以及栅极结构,所述栅极结构形成于所述半导体本体内并且靠近所述第一表面。所述第一纵型MOSFET的所述第一表面和所述第二纵型MOSFET的所述第二表面大致共面,导电材料大致围绕所述纵型MOSFET并且将所述第一纵型MOSFET的所述第一表面短接到所述第二纵型MOSFET的所述第二表面。
在通过示例而非限制的方式阐述的实施例中,一种功率开关装置,包括:半导体本体,所述半导体本体具有第一表面和第二表面以及在它们之间形成的纵型半导体结构。在常规设计中,用于所述纵型半导体结构的控制节点通常会与所述第一表面相关;但是相反地,在所述半导体本体内在所述第一表面与所述第二表面之间延伸的通路将所述控制节点与所述第二表面相关联。
通过使用贯通本体通路,可从背部显现栅极,使得可能将管芯相对于常规MOSFET“翻转”,以将管芯的源极与常规MOSFET的漏极短接。这简化了封装,从而得到在芯片之间的更好连接以及因而得到总体上更好的性能。
通过阅读下述说明并研究下述附图,本文所公开的这些和其它实施例以及优势和其它特征对于本领域技术人员将显而易见。
附图说明
现将参考附图来描述几个示例性实施例,其中相同的部件采用相同的附图标记。示例性实施例旨在描述性而不是限制性的。附图包括以下:
图1是现有技术的示例性纵型MOSFET单元的截面图;
图2是现有技术的纵型MOSFET的简化示意图;
图3是根据现有技术的耦合到一起的一对纵型MOSFET的示意图;
图4是图3的MOSFET的物理互连的示意图;
图5是现有技术的纵型MOSFET的罐式封装的示意图;
图6是具有用于栅极的贯通本体通路的纵型MOSFET的简化示意图;
图7是图6中用虚线7包围的部分的放大图;
图8是常规纵型MOSFET与图6的MOSFET之间的示例性物理连接的示意图;以及
图9是常规纵型MOSFET与图6的MOSFET在罐式封装件内的示例性物理连接的局部截面图。
具体实施方式
图1-5关于现有技术进行讨论。图6-9通过示例而非限制的方式描述几个实施例。
在图6中,根据实施例的纵型MOSFET 22具有本体B,其包括例如硅或砷化镓的半导体材料。本体B通常是片材,已知为半导体晶圆的“管芯”。多个管芯被称为“芯片”。本体B可以是大致单晶体或者可由多个形成层制成。
如在现有技术中所述,纵型MOSFET 22由许多MOSFET单元制成,其中漏极、源极和栅极耦合到一起以形成纵型MOSFET 22的漏极D、源极S和栅极G。存在纵型MOSFET和MOSFET单元的许多设计,如本领域技术人员已知的那样。例如,不受限制地参见B.E.Taylor的1993年在John Wiley&Sons,Inc.出版的POWER MOSFET DESIGN,上述文献以引用的方式结合到本文。
纵型MOSFET 22配置有在本体B内的通路结构V并且在该示例中其示出为在与源极S相关的第一表面24和栅极结构G之间延伸。第二表面26与漏极D相关。由于导电通路结构V,栅极结构G靠近漏极D而不靠近源极S地形成(与现有技术相反)。
另外参考图7,图7是图6中由虚线7包围的部分的放大图,栅极G包括导电材料28,其通过绝缘层30与本体B电隔离。导电材料28可以是多晶硅或其它导电材料,例如诸如铝的金属。绝缘层30可以是几种处理相容的类型,例如二氧化硅或氮化硅。术语“栅极”和“栅极结构”有时将同义地使用,虽然有时“栅极”主要是指栅极的导电部分,而“栅极结构”将通常指代栅极的导电部分和绝缘部分。
通路结构V包括导电材料32,其通常是金属,例如钨、铝和铜等等。通路结构V还包括绝缘层34,其将导电材料32与本体B电隔离。术语“通路”和“通路结构”有时将同义地使用,虽然有时“通路”主要指通路的导电部分,而“通路结构”将通常指代通路的导电部分和绝缘部分。
在半导体晶圆中通路的形成是本领域技术人员已知的。例如,参见Robert Doering(编者)和Yoshio Nishi(编者)2007年CRC第二版的Handbook of Semiconductor Manufacturing Technology,SecondEdition,该文献以引用的方式结合到本文。可通过本领域技术人员已知的许多方法来在晶圆中形成通路孔,包括各向异性等离子体蚀刻和激光钻孔等。
图7的描述仅采用示例而非限制的方式。通路V的导电材料32示出为在边界面36处抵靠栅极G的导电材料28。然而,导电材料可由中间材料耦合到一起、可熔合到一起、可形成为连续材料等等。类似地,栅极G的绝缘材料30和通路V的绝缘材料34示出为在边界面35处抵靠。然而,这些绝缘材料可类似地通过其它绝缘材料耦合到一起、可熔合到一起、可形成为连续材料等。
图8通过示例而非限制的方式描述了MOSFET功率芯片38的实施例。功率芯片38包括上述常规纵型MOSFET管芯9和纵型MOSFET管芯22。MOSFET 22的源极和MOSFET 9的漏极通过导电板P(通常是金属,例如铝)短接,以形成MOSFET对的相引脚。MOSFET 22的栅极G和漏极D分别耦合到导电导线40和42,MOSFET 9的栅极G和源极S分别耦合到导电导线44和46。MOSFET功率芯片38通常被封装在封装件内,如虚线48所提示的。
要注意,图8仅是描述性的实施例。MOSFET功率芯片38例如可包括在封装件48内的其它电路,可与MOSFET 9和/或22互连或不互连。在该示例中,导线40-46示出为作为外部触头延伸出封装件48。替代性地,一些导线或所有导线可在封装件48内进行内部连接。有利地,板P可用于以串联方式将两个MOSFET互连,以在板P处形成相引脚而不需要焊接丝线。
图9通过示例而非限制的方式描述了MOSFET功率芯片50的实施例。功率芯片38包括上述常规纵型MOSFET管芯9和纵型MOSFET管芯22,虽然它们已经相对于图8的实施例被翻转。MOSFET 22的源极和MOSFET 9的漏极由导电板P(通常为金属)短接到一起,该导电板是金属罐式封装件52的一部分。
要注意,图9仅是描述性的实施例。MOSFET功率芯片50例如可包括在罐式封装件52的其它电路,可与MOSFET 9和/或22互连或不互连。有利地,罐式封装件52的板P可用于将两个MOSFET以串联方式互连,以形成相引脚而不需要焊接丝线。
在以引用的方式结合到本文中的Standing等人的美国专利No.6,624,522、No.6,930,397和No.7,285,866中教导了将金属罐用作MOSFET的封装件。作为示例,罐式封装件52可由镀银铜合金制成。其内部尺寸通常大于MOSFET 9和22的内部尺寸。MOSFET 9的漏极D可通过载银导电环氧树脂54的层连接到罐52底部。类似地,作为非限制性示例,MOSFET 22的源极S可通过载银导电环氧树脂54的层连接到罐52底部。作为非限制性示例,低应力高结合环氧树脂56的环可设置在MOSFET 9和22之间及其边缘周围,以密封封装件52并且为封装件52提供附加结构强度。作为非限制性示例,MOSFET 22的栅极G和漏极D以及MOSFET 9的栅极G和源极S暴露到罐式封装件52的开口端58。因此,常规MOSFET和具有用于其栅极的贯通本体通路的MOSFET的配对允许一系列连接的MOSFET对包封在高性能罐式封装件内。
虽然上述实施例基于MOSFET结构,但是本领域技术人员将理解的是,在示例性实施例中也可采样其它纵型装置。例如,在一些实施例中,诸如IGBT MOSFET、纵型DMOS、纵型JEFT GTO(栅极可关断晶闸管)和MCT(MOS控制晶闸管)的纵型装置可用来制造纵型半导体开关装置。作为非限制性示例的这种实施例包括具有第一表面和第二表面的半导体本体以及在其间形成的纵型半导体结构,其中用于纵型半导体结构的控制栅极通常会与第一表面相关联,在半导体本体内在第一表面与第二表面之间延伸的通路将控制栅极与第二表面相关联。
虽然使用特定术语和装置描述了各种实施例,但是这种描述仅为描述性的目的。所使用的词语是描述性而不是限制性的。应当理解的是,在不偏离由下述权利要求书限定的本发明精神或范围的前提下,本领域技术人员可作出各种变化和变换。此外,应当理解的是,其它各个实施例的方面可整体或部分地互换。因此,权利要求书旨在解释为依据本发明的实质精神和范围而不是限制性或禁止性的。
Claims (22)
1.一种纵型MOSFET,包括:
半导体本体,所述半导体本体具有限定源极的大致平面第一表面以及限定漏极的大致平面第二表面,所述第一表面和所述第二表面彼此大致平行但不共面;
栅极,所述栅极形成于所述半导体本体内并且靠近所述第二表面;和
通路,所述通路形成于半导体本体内至少部分地位于所述第一表面与所述第二表面之间并且耦合到所述栅极。
2.根据权利要求1所述的纵型MOSFET,其特征在于,所述本体包括硅。
3.根据权利要求2所述的纵型MOSFET,其特征在于,所述硅包括硅晶圆的至少一部分。
4.根据权利要求1所述的纵型MOSFET,其特征在于,所述纵型MOSFET包括多个MOSFET单元,所述MOSFET单元包括源极、漏极和栅极,所述源极、漏极和栅极分别电连接到所述纵型MOSFET的所述源极、漏极和栅极。
5.根据权利要求1所述的纵型MOSFET,其特征在于,所述栅极包括导电材料。
6.根据权利要求5所述的纵型MOSFET,其特征在于,所述栅极还包括绝缘层,所述绝缘层将所述栅极的所述导电材料与所述本体电隔离。
7.根据权利要求6所述的纵型MOSFET,其特征在于,所述通路包括导电材料,所述导电材料电连接到所述栅极的所述导电材料。
8.根据权利要求7所述的纵型MOSFET,其特征在于,所述通路还包括绝缘层,所述绝缘层将所述通路的所述导电材料与所述本体电隔离。
9.一种MOSFET功率芯片,包括:
第一纵型MOSFET,所述第一纵型MOSFET包括半导体本体,所述半导体本体具有限定源极的第一表面以及限定漏极的第二表面;栅极结构,所述栅极结构形成于所述半导体本体内并且靠近所述第二表面;以及通路,所述通路位于半导体本体内并且大致垂直于所述第一表面和所述第二表面,所述通路具有电耦合到所述第一表面的第一端和电耦合到所述栅极结构的第二端;
第二纵型MOSFET,所述第二纵型MOSFET包括半导体本体,所述半导体本体具有限定源极的第一表面以及限定漏极的第二表面;以及栅极结构,所述栅极结构形成于所述半导体本体内并且靠近所述第一表面;所述第一纵型MOSFET的所述第一表面和所述第二纵型MOSFET的所述第二表面大致共面;和
导电材料,所述导电材料将所述第一纵型MOSFET的所述第一表面耦合到所述第二纵型MOSFET的所述第二表面。
10.根据权利要求7所述的MOSFET功率芯片,其特征在于,所述第一纵型MOSFET的所述本体以及所述第二纵型MOSFET的所述本体包括硅。
11.根据权利要求7所述的MOSFET功率芯片,还包括导电板,所述导电板将所述第一纵型MOSFET的所述漏极耦合到所述第二纵型MOSFET的所述漏极。
12.根据权利要求9所述的MOSFET功率芯片,还包括耦合到所述第一纵型MOSFET的所述栅极和漏极的导线以及耦合到所述第二纵型MOSFET的所述栅极和源极的导线。
13.根据权利要求10所述的MOSFET功率芯片,其特征在于,所述第一纵型MOSFET和所述第二纵型MOSFET设置在封装件内。
14.根据权利要求11所述的MOSFET功率芯片,其特征在于,所述封装件包括塑料、陶瓷和金属的至少一种。
15.一种MOSFET功率芯片,包括:
第一纵型MOSFET,所述第一纵型MOSFET包括半导体本体,所述半导体本体具有限定源极的第一表面以及限定漏极的第二表面;栅极结构,所述栅极结构形成于所述半导体本体内并且靠近所述第二表面;以及通路,所述通路位于半导体本体内并且大致垂直于所述第一表面和所述第二表面,所述通路具有电耦合到所述第一表面的第一端和电耦合到所述栅极结构的第二端;
第二纵型MOSFET,所述第二纵型MOSFET包括半导体本体,所述半导体本体具有限定源极的第一表面以及限定漏极的第二表面;以及栅极结构,所述栅极结构形成于所述半导体本体内并且靠近所述第一表面;所述第一纵型MOSFET的所述第一表面和所述第二纵型MOSFET的所述第二表面大致共面;和
导电罐,所述导电罐大致围绕所述第一纵型MOSFET和所述第二纵型MOSFET并且将所述第一纵型MOSFET的所述第一表面覆盖到所述第二纵型MOSFET的所述第二表面。
16.根据权利要求15所述的MOSFET功率芯片,其特征在于,所述第一纵型MOSFET和所述第二纵型MOSFET设置在所述导电罐内。
17.根据权利要求16所述的MOSFET功率芯片,其特征在于,所述第一纵型MOSFET的所述第一表面和所述第二纵型MOSFET的所述第二表面电耦合到所述罐。
18.根据权利要求17所述的MOSFET功率芯片,其特征在于,所述第一纵型MOSFET的所述第一表面和所述第二纵型MOSFET的所述第二表面通过导电结合剂电耦合到所述罐。
19.根据权利要求17所述的MOSFET功率芯片,其特征在于,所述第一纵型MOSFET的所述第一表面和所述第二纵型MOSFET的所述第二表面通过焊料电耦合到所述罐。
20.根据权利要求19所述的MOSFET功率芯片,其特征在于,所述罐包括金属。
21.一种功率开关装置,包括:
半导体本体,所述半导体本体具有第一表面和第二表面以及在它们之间形成的纵型半导体结构,其中用于所述纵型半导体结构的控制节点通常会与所述第一表面相关;和
通路,所述通路在所述半导体本体内在所述第一表面与所述第二表面之间延伸,以将所述控制节点与所述第二表面相关联。
22.根据权利要求21所述的纵型半导体开关装置,其特征在于,所述纵型开关半导体结构选自主要包括如下的组:MOSFET、IGBTMOSFET、纵型DMOS纵型JEFT GTO和MCT。
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Cited By (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN103022132A (zh) * | 2011-09-23 | 2013-04-03 | 英飞凌科技股份有限公司 | 具有半导体通孔的半导体器件 |
CN104517954A (zh) * | 2013-10-02 | 2015-04-15 | 英飞凌科技奥地利有限公司 | 在两个衬底之间具有半导体芯片的晶体管布置 |
US9324829B2 (en) | 2011-09-23 | 2016-04-26 | Infineon Technologies Ag | Method of forming a trench electrode device with wider and narrower regions |
CN105743477A (zh) * | 2012-07-13 | 2016-07-06 | 英飞凌科技股份有限公司 | 桥接电路 |
CN107768355A (zh) * | 2016-08-16 | 2018-03-06 | 英飞凌科技美国公司 | 单侧功率装置封装体 |
CN110190040A (zh) * | 2018-02-23 | 2019-08-30 | 英飞凌科技奥地利有限公司 | 半导体封装,半导体模块,电子组件以及制造半导体封装和半导体模块的方法 |
Families Citing this family (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US20090125022A1 (en) * | 2007-11-12 | 2009-05-14 | Voyage Medical, Inc. | Tissue visualization and ablation systems |
US7910992B2 (en) | 2008-07-15 | 2011-03-22 | Maxim Integrated Products, Inc. | Vertical MOSFET with through-body via for gate |
US8569135B2 (en) * | 2011-07-20 | 2013-10-29 | International Business Machines Corporation | Replacement gate electrode with planar work function material layers |
EP2555241A1 (en) * | 2011-08-02 | 2013-02-06 | Nxp B.V. | IC die, semiconductor package, printed circuit board and IC die manufacturing method |
US9576887B2 (en) | 2012-10-18 | 2017-02-21 | Infineon Technologies Americas Corp. | Semiconductor package including conductive carrier coupled power switches |
US9397212B2 (en) * | 2012-10-18 | 2016-07-19 | Infineon Technologies Americas Corp. | Power converter package including top-drain configured power FET |
CN114982078B (zh) * | 2020-01-13 | 2023-04-28 | 新唐科技日本株式会社 | 半导体装置 |
Family Cites Families (19)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4235662A (en) * | 1978-06-28 | 1980-11-25 | Sotec Corporation | Layer of crystalline silicon having (111) orientation on (111) surface of lithium aluminum |
US5087478A (en) * | 1989-08-01 | 1992-02-11 | Hughes Aircraft Company | Deposition method and apparatus using plasma discharge |
GB9929613D0 (en) * | 1999-12-15 | 2000-02-09 | Koninkl Philips Electronics Nv | Manufacture of semiconductor material and devices using that material |
KR100699552B1 (ko) * | 2000-02-10 | 2007-03-26 | 인터내쇼널 렉티파이어 코포레이션 | 단일면 상에 돌출 접촉부를 갖는 수직 전도성의 플립칩디바이스 |
US6624522B2 (en) | 2000-04-04 | 2003-09-23 | International Rectifier Corporation | Chip scale surface mounted device and process of manufacture |
US6392290B1 (en) * | 2000-04-07 | 2002-05-21 | Siliconix Incorporated | Vertical structure for semiconductor wafer-level chip scale packages |
US6930397B2 (en) | 2001-03-28 | 2005-08-16 | International Rectifier Corporation | Surface mounted package with die bottom spaced from support board |
US6815781B2 (en) | 2001-09-25 | 2004-11-09 | Matrix Semiconductor, Inc. | Inverted staggered thin film transistor with salicided source/drain structures and method of making same |
US6930893B2 (en) * | 2002-01-31 | 2005-08-16 | Vlt, Inc. | Factorized power architecture with point of load sine amplitude converters |
ITMI20031178A1 (it) | 2003-06-11 | 2004-12-12 | Getters Spa | Depositi multistrato getter non evaporabili ottenuti per |
US7109551B2 (en) * | 2003-08-29 | 2006-09-19 | Fuji Electric Holdings Co., Ltd. | Semiconductor device |
US7323745B2 (en) * | 2004-01-26 | 2008-01-29 | International Rectifier Corporation | Top drain MOSFET |
US6906380B1 (en) * | 2004-05-13 | 2005-06-14 | Vishay-Siliconix | Drain side gate trench metal-oxide-semiconductor field effect transistor |
KR100734266B1 (ko) | 2005-07-15 | 2007-07-02 | 삼성전자주식회사 | 콘택 저항이 개선된 수직 채널 반도체 소자 및 그 제조방법 |
US7285807B2 (en) | 2005-08-25 | 2007-10-23 | Coldwatt, Inc. | Semiconductor device having substrate-driven field-effect transistor and Schottky diode and method of forming the same |
US8008716B2 (en) * | 2006-09-17 | 2011-08-30 | Alpha & Omega Semiconductor, Ltd | Inverted-trench grounded-source FET structure with trenched source body short electrode |
US20090096003A1 (en) * | 2007-10-11 | 2009-04-16 | International Business Machines Corporation | Semiconductor cell structure including buried capacitor and method for fabrication thereof |
US8294208B2 (en) * | 2008-03-04 | 2012-10-23 | International Rectifier Corporation | Semiconductor device having a gate contact on one surface electrically connected to a gate bus on an opposing surface |
US7910992B2 (en) | 2008-07-15 | 2011-03-22 | Maxim Integrated Products, Inc. | Vertical MOSFET with through-body via for gate |
-
2008
- 2008-07-15 US US12/173,815 patent/US7910992B2/en not_active Expired - Fee Related
-
2009
- 2009-07-14 WO PCT/US2009/004068 patent/WO2010008527A1/en active Application Filing
- 2009-07-14 DE DE112009001714T patent/DE112009001714T5/de not_active Withdrawn
- 2009-07-14 CN CN2009801272585A patent/CN102099919B/zh not_active Expired - Fee Related
- 2009-07-15 TW TW098123937A patent/TWI398002B/zh not_active IP Right Cessation
-
2011
- 2011-02-25 US US13/035,842 patent/US8188541B2/en not_active Expired - Fee Related
-
2012
- 2012-05-28 US US13/481,937 patent/US8629499B2/en active Active
Cited By (13)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US10032878B2 (en) | 2011-09-23 | 2018-07-24 | Infineon Technologies Ag | Semiconductor device with a semiconductor via and laterally connected electrode |
CN103022132A (zh) * | 2011-09-23 | 2013-04-03 | 英飞凌科技股份有限公司 | 具有半导体通孔的半导体器件 |
US9324829B2 (en) | 2011-09-23 | 2016-04-26 | Infineon Technologies Ag | Method of forming a trench electrode device with wider and narrower regions |
CN103022132B (zh) * | 2011-09-23 | 2016-06-22 | 英飞凌科技股份有限公司 | 具有半导体通孔的半导体器件 |
CN105743477B (zh) * | 2012-07-13 | 2018-08-10 | 英飞凌科技股份有限公司 | 桥接电路 |
CN105743477A (zh) * | 2012-07-13 | 2016-07-06 | 英飞凌科技股份有限公司 | 桥接电路 |
CN104517954B (zh) * | 2013-10-02 | 2017-10-03 | 英飞凌科技奥地利有限公司 | 在两个衬底之间具有半导体芯片的晶体管布置 |
US9806029B2 (en) | 2013-10-02 | 2017-10-31 | Infineon Technologies Austria Ag | Transistor arrangement with semiconductor chips between two substrates |
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US10490505B2 (en) | 2016-08-16 | 2019-11-26 | Infineon Technologies Americas Corp. | Single-sided power device package |
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TW201007948A (en) | 2010-02-16 |
US20100013011A1 (en) | 2010-01-21 |
US20120292691A1 (en) | 2012-11-22 |
US8188541B2 (en) | 2012-05-29 |
US7910992B2 (en) | 2011-03-22 |
US8629499B2 (en) | 2014-01-14 |
DE112009001714T5 (de) | 2011-06-16 |
WO2010008527A1 (en) | 2010-01-21 |
CN102099919B (zh) | 2013-07-31 |
US20110227153A1 (en) | 2011-09-22 |
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