CN101742813A - 安装板和半导体模块 - Google Patents
安装板和半导体模块 Download PDFInfo
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- CN101742813A CN101742813A CN200910222812A CN200910222812A CN101742813A CN 101742813 A CN101742813 A CN 101742813A CN 200910222812 A CN200910222812 A CN 200910222812A CN 200910222812 A CN200910222812 A CN 200910222812A CN 101742813 A CN101742813 A CN 101742813A
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- 239000004065 semiconductor Substances 0.000 title claims description 82
- 239000000758 substrate Substances 0.000 claims abstract description 15
- 238000001816 cooling Methods 0.000 claims description 36
- 238000003475 lamination Methods 0.000 claims description 26
- 230000004888 barrier function Effects 0.000 claims description 10
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- 229910052802 copper Inorganic materials 0.000 description 12
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- PXHVJJICTQNCMI-UHFFFAOYSA-N Nickel Chemical compound [Ni] PXHVJJICTQNCMI-UHFFFAOYSA-N 0.000 description 2
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 2
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- H01L23/49811—Additional leads joined to the metallisation on the insulating substrate, e.g. pins, bumps, wires, flat leads
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Abstract
本发明涉及安装板和半导体模块。安装板包括层压布线部分,所述层压布线部分包括以层压方式形成在基板的表面上的多个布线层,其中内布线层的一部分暴露于外面,该内布线层是多个布线层中除了最上面的布线层之外的任意布线层。
Description
技术领域
本发明涉及用于将电子组件安装在其上的安装板(mountboard),以及包括该安装板的半导体模块。
背景技术
近年来,对于用来将包括半导体芯片(如大规模集成(LSI)芯片)的电子组件安装在其上的安装板,已经要求高密度和低热阻(thermal resistance)。要求高密度是因为LSI芯片的引线数增加且对包括多个半导体芯片的多芯片模块的使用变得普遍。要求低热阻是因为LSI芯片的功率消耗增加以及与最终产品相关的因素。
一般说来,用于多芯片模块的安装板必须具有针对多芯片模块中的每个半导体芯片的一组电极端子。因此,在半导体芯片被安装的一侧上的布线被多层化。因此,被称作积层板(build-up board)的多层布线板被用作安装板(见例如日本专利No.2739726)。一般说来,积层基板包括芯板和对称地层压在芯板的上表面和下表面上的布线层。
诸如LSI芯片的半导体芯片或包括密封于其中的半导体芯片的半导体封装被安装在安装板上,使得半导体芯片或半导体封装例如通过凸起电气地并机械地连接到最上面的布线层。日本未审专利申请公开No.07-176873公开了一种使用管芯接合部件将半导体芯片固定到接合焊盘且通过导线接合将其电连接到最上面的布线层的技术。另外,日本未审专利申请公开No.07-176873公开了通过积层层(build-uplayer)的最上面的布线层将半导体芯片产生的热辐射到大气中的技术。
当如半导体芯片和半导体封装的半导体装置被安装在积层布线层的最上面的层上时,半导体芯片和半导体封装生成的一部分热通过最上面的层被转移到与最上面的层连接的内布线层(下层)。
发明内容
然而,形成在安装半导体装置的一侧上的每个布线层覆盖有具有高热阻的树脂绝缘层。而且,如果最上面的布线层用于热辐射,则可用于安装电子部件的区域受到限制。因此,没有同时满足高密度的要求和低热阻的要求。
期望提供一种通过其同时满足安装电子部件时的高密度的要求和低热阻的要求的技术。
根据本发明的实施例,提供了一种包括层压布线部分的安装板,该层压布线部分包括以层压方式形成在基板表面上的多个布线层,其中内布线层的一部分暴露于外面,内布线层是多个布线层中除了最上面的布线层之外的任意一个。
通过安装板,可使用暴露于外面的内布线层的一部分将冷却结构安装在安装板上。冷却结构用来减小通过布线层的传热路径的热阻。
根据实施例,可使用暴露于外面的内布线层的一部分将冷却结构安装在安装板上。因而,可减小通过布线层的传热路径的热阻,而不限制用于安装电子部件的面积。因此,就安装电子组件而言,可同时满足高密度的要求和低热阻的要求。
附图说明
图1是根据本发明实施例的安装板的截面图;
图2A-2F示出了制造芯板的方法;
图3A-3H是示出了根据本发明实施例制造安装板的方法的示意图;
图4是根据本发明实施例的半导体模块的截面图;
图5是示出了根据本发明实施例制造半导体模块的方法的截面图;
图6是示出了根据本发明实施例的半导体模块如何被安装的例子的截面图;
图7是根据本发明实施例的第一变型的安装板和半导体模块的截面图;以及
图8是根据本发明实施例的第二变型的安装板和半导体模块的截面图。
具体实施方式
以下参考附图说明本发明的实施例。本发明的技术范围不限于下述实施例且包括各种变型和组合,只要通过使用本发明的要素及其组合可获得特定的优点即可。
实施例
安装板的结构
图1是根据本发明实施例的安装板的截面图。安装板1包括芯板2和层压布线部分3。芯板2包括例如具有板状形状的基板4、形成在基板4的上下表面上的布线层5和6以及将布线层5和6彼此电连接的馈通导体7。基板4例如由刚性材料(如环氧玻璃)制成。布线层5和6例如由布线材料(如铜)制成。每个馈通导体7包括在延伸通过基板4的通孔的侧壁上形成的导电膜,该通孔填充有树脂。
例如通过以下方法制成芯板2。如图2A所示,制备包括如玻璃环氧基板的基板的双侧铜包覆层压板(clad laminate)31。如图2B所示,双侧铜包覆层压板31被钻孔以在其中形成通孔32。如图2C所示,双侧铜包覆层压板31的通孔32的侧壁被用铜电镀从而在其上形成导电膜33。
如图2D所示,向覆盖有导电膜33的通孔32填充树脂34。如图2E所示,树脂34的端表面被用铜电镀从而在其上形成导电膜35。如图2F所示,双侧铜包覆层压板31的表面被蚀刻从而在其上形成铜的布线图案36。在这些步骤之后,获得芯板2。
层压布线部分3包括将绝缘层14夹持在其中间的多个布线层(包括布线层5)。层压布线部分3作为独立的岛状物(island)形成在芯板2上。结果,在芯板2的最***,形成不存在层压布线部分3的布线层和绝缘层的区域,即基板4的表面(上表面)暴露于外面的区域2a。布线层夹持的绝缘层14的边缘部分形成从上侧(远离芯板2的侧)到下侧(靠近芯板2的侧)逐渐加宽的阶梯形状。布线层5布置在阶梯形状的底部(作为最下层),从而使得布线层5的部分5a(边缘部分)暴露于外面。布线层5是内布线层,其是布线层中除了最上面的布线层之外的一个。术语“内布线层”不仅指作为最下层的布线层5,而且还指布置在最上面的层之下的层压布线部分3中的任意层。优选地,具有暴露于外面的部分的布线层5是用于接地(ground)的布线层。
制造安装板的方法
图3A-3H是示出根据本发明实施例制造安装板的方法的示意图。如图3A所示,制备包括基板4和布线层5和6的芯板2。在该阶段,芯板2是包括彼此集成且设置在平面内的单独的芯板块的大基板。单独的芯板块要被切分成最终产品的尺寸。在图3A-3H中,为了便于图示,芯板2包括三个将被切分成单独的块的芯板的单元。
如图3B所示,当制备芯板2时,在芯板2的表面上形成由光敏树脂制成的树脂层8。当如上所述形成布线层时,树脂层8用作布线层之间的绝缘层。通过例如应用负光敏树脂膜来形成树脂层8。
如图3C所示,树脂层8被曝光和显影(develop),使得树脂层8被划分(分离)成芯板2上的岛状物,且在每个岛状物的树脂层8中形成多个通孔9。此时,作为内布线层的最下层的布线层5的部分5a(边缘部分)暴露于外面,部分5a在已经被分离成岛状物的树脂层8的边缘部分外侧。布线层5的部分5a延伸到例如距离产品轮廓a=200μm的位置。布线层5的部分5a以例如b=0.5mm的长度暴露于外面。
当树脂层8被划分成独立的岛状物时,树脂层8的物理连接(连续性)在板平面中彼此相邻的单独的芯板块之间的边界处(切割线)被打破。因而,由于树脂层8的热收缩导致的应力在整个板上分散。结果,由于树脂层8的热收缩导致的芯板2的翘曲得到抑制。
如图3D所示,使树脂层8的表面粗糙。通过使用例如高锰酸溶液使树脂层8的表面粗糙,从而使得表面可具有Ra=0.5μm的平均粗糙度。随后,通过铜的化学镀将初始镀层10(铜种子层)沉积到例如0.5μm的厚度。
如图3E所示,在芯板2的表面上形成阻剂膜(resist film),使其覆盖树脂层8的岛状物。随后,阻剂膜通过曝光和显影被图案化,从而形成抗镀剂(plating resist)11。
如图3F所示,树脂层8没有覆盖抗镀剂11的表面的部分被用铜电镀从而形成具有例如15μm的厚度的布线图案12。布线图案12就在最下面的布线层5之上提供布线层。随后,移除抗镀剂11和初始镀层10。
如图3G所示,通过重复图3B-3F的步骤,获得具有积层结构的布线板(积层板),其包括芯板2和形成在芯板2上的层压布线部分3。层压布线部分3被形成为各自包括布线层的岛状物。每次在芯板2上堆叠布线层时,布置在布线层之间的树脂层8的面积逐步减小,使得绝缘层的边缘部分形成阶梯形状。树脂层8的面积按以下方式减小,即,使得对于每层,树脂层8在与基板表面平行的方向(图3G的水平方向)上的长度从两端减小例如c=200μm。
如图3H所示,针对层压布线部分3的每个岛状物通过对芯板2进行切割和布线将芯板2切分成单独的块。由此获得安装板1。安装板1包括层压布线部分3,其包括形成在芯板2的表面上的布线层。作为内层的布线层5的部分5a暴露于外面。在安装板1中,形成在芯板2的上表面上的布线层的数目不同于形成在芯板2的下表面上的布线层的数目。更具体地说,形成在芯板2的上表面上的布线层的数目大于形成在芯板2的下表面上的布线层的数目。因此,布线层关于芯板2在垂直方向上被不对称地层压。
半导体模块的结构
图4是根据本发明实施例的半导体模块的截面图。半导体模块20包括安装板1和安装在安装板1上的半导体装置。安装半导体芯片21和半导体封装22,作为半导体装置。半导体芯片21、半导体封装22和半导体组件23被安装在形成于安装板1的表面上的布线层上。
通过倒装芯片方法将半导体芯片21作为裸芯片安装。半导体芯片21电气地并且机械地连接到形成在安装板1上的布线层的最上面的层。每个半导体封装22是例如包括通过树脂密封的半导体芯片(例如存储器LSI芯片,未示出)的球栅阵列(ball grid array,BGA)封装。与半导体芯片21一样,半导体封装22通过外部连接端子(如焊料球)电气地并且机械地连接到最上面的布线层。在安装板1的表面上,半导体封装22与半导体芯片21相邻地布置。芯片组件23例如是无源组件(如芯片电容器)。与半导体芯片21和半导体封装22一样,芯片组件23电气地并且机械地连接到最上面的布线层。
作为冷却结构的例子的两个冷却片24安装在安装板1上。冷却片24通过例如由导热粘结剂制成的粘结剂层25附着到如上所述暴露于外面的最下面的布线层5的部分5a。由此,冷却片24安装在安装板1上且热连接到布线层5的部分5a。作为导热粘结剂,可使用由其中分散有氧化硅、金属粉末、陶瓷粉末等无机填料的有机材料(如环氧树脂)制成的粘结剂。
作为冷却片24,可使用表面镀镍、作为具有高热传导性的金属的铜制成的结构。冷却片24包括在图4的深度方向上设置的梳状片部分。冷却片24安装在安装板1上,使得布线层的岛状物介于冷却片24之间。冷却片24彼此面对,布线层的岛状物位于其间。
冷却结构不限于冷却片24,并且可以是例如散热器。除了如冷却片24的冷却结构之外,可使用暴露于外面的内布线层5的部分5a将电子组件(未示出)安装在安装板1上。
制造半导体模块的方法
如图5所示,半导体芯片21、半导体封装22和半导体组件23安装在通过上述方法获得的安装板1上。如图4所示,冷却片24使用粘结剂层25附着到暴露于外面的内布线层5的部分5a。由此,获得半导体模块20。如图6所示,例如,使用作为外部连接端子形成在芯板2的下表面上的凸起26(例如焊料凸起)将半导体模块20安装在母板27上。
在该实施例中,安装板1被配置成使得布线层5的部分5a暴露于外面,其中布线层5是除了最上面的布线层之外的层压布线部分3的内层中的一个。由此,可使用布线层5的部分5a将冷却结构(如冷却片24)安装在安装板1上。因此,可减小通过布线层延伸的传热路径的热阻,而不限制安装电子组件的面积。结果,就电子组件的安装而言,可同时满足高密度的要求和低热阻的要求。
而且,由于层压布线部分3作为芯板2上独立的岛状物形成,当具有大尺寸的芯板2被切分成单独的安装板1的块时,相邻的安装板之间的层压布线部分3的物理连接被打破。因而,可减小由于层压布线部分3的绝缘层14的热收缩导致的大尺寸芯板的翘曲。
通过将具有暴露于外面的部分的布线层5用于接地(ground),可获得以下优点。也就是说,用于接地的布线层具有布线层中最大的面积。因此,例如,通过使用于接地的布线层的部分暴露于外面,从而如上所述将冷却结构安装于其上,可将热有效地转移到冷却结构。
由于布置在布线层之间的绝缘层14的边缘部分以阶梯形状形成,不仅最下面的布线层的边缘部分而且除了最上面的层以外的任意内布线层的边缘部分都可在绝缘层外延伸并可暴露于外面。
安装板1的布线层在垂直方向上被不对称地(层的数目不对称)层压。因而,在安装板1的上表面,可根据安装在其上的半导体装置(如半导体芯片21和半导体封装22)的端子的数目和布置来形成所需数目的布线层。在安装板1的下表面上,可根据用于在母板27上安装安装板1的端子的数目和布置来形成所需数目的布线层。因而,与布线层在垂直方向上对称地形成在安装板上的情况相比,可减小安装板在母板上安装的一侧(下侧)上的层的数目,从而可减小用于布线的步骤数目,并因此可减小安装板的成本。
半导体模块20被配置成使得如半导体芯片21和半导体封装22的半导体装置被安装在安装板1上。而且,冷却片24被安装在安装板1上,且热连接到布线层5的部分5a。因而,半导体装置(如半导体芯片21和半导体封装22)生成的热可通过内布线层5被有效地转移到冷却片24。
第一变型
图7是根据本发明实施例的第一变型的安装板和半导体模块的截面图。如图7所示,在半导体模块20中,最下面的布线层5的部分5a暴露于外面,且使用暴露的部分将冷却结构28安装在安装板1上。冷却结构28具有门状形状。三个半导体封装22被安装在安装板1上。每个半导体封装22的封装表面通过其与冷却结构28之间的导热树脂的粘结剂层29接合到冷却结构28。
该半导体模块20的结构使得每个半导体封装22生成的热能够通过粘结剂层29以及通过布线层5转移。因此,与半导体封装22生成的热仅通过布线层5转移的情况相比,热可有效地被转移到冷却结构28。
第二变型
图8是根据本发明实施例的第二变型的安装板和半导体模块的截面图。如图8所示,在半导体模块20中,最下面的布线层5的部分5a暴露于外面,并且使用暴露的部分将冷却片24安装在安装板1上。而且,就在最上面的层之下的布线层的部分15a暴露于外面,并且使用暴露的部分将具有门状形状的冷却结构16安装在安装板1上。冷却结构16围绕布置在两个半导体封装22之间的半导体封装17。半导体封装17的封装表面通过其与冷却结构16之间的导热树脂的树脂层18接合到冷却结构16。由此,冷却结构16热连接到半导体封装17。
该半导体模块20的结构使得例如当密封在半导体封装17中的半导体芯片生成大量热时,半导体封装17生成的热被有效地转移到冷却结构16。而且,可减小半导体封装17生成的热对邻近的半导体封装22的影响。
本申请包含与2008年11月19日在日本专利局提交的日本在先专利申请JP2008-295195中的所公开的主题相关的主题,其全部内容通过引用包括在此。
本领域技术人员应理解基于设计要求和其他因素可出现各种变型、组合、子组合和变化,只要其在权利要求及其等同物的范围内即可。
Claims (5)
1.一种安装板,包括:
层压布线部分,其包括以层压方式形成在基板的一个表面上的多个布线层,
其中内布线层的一部分暴露于外面,所述内布线层是多个布线层中除了最上面的布线层之外的任意布线层。
2.根据权利要求1所述的安装板,
其中所述层压布线部分被形成为独立的岛状物。
3.根据权利要求1或2所述的安装板,
其中所述内布线层是用于接地的布线层。
4.根据权利要求1-3中任一项所述的安装板,
其中布置在所述多个布线层之间的绝缘层的边缘部分以阶梯形状形成。
5.一种半导体模块,包括:
安装板,其包括层压布线部分,所述层压布线部分包括以层压方式形成在基板的表面上的多个布线层,内布线层的一部分暴露于外面,所述内布线层是多个布线层中除了最上面的布线层之外的任意布线层;
半导体装置,安装在所述安装板上并且电连接到所述多个布线层;以及
冷却结构,安装在所述安装板上并且热连接到所述内布线层的一部分。
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2008
- 2008-11-19 JP JP2008295195A patent/JP4730426B2/ja not_active Expired - Fee Related
-
2009
- 2009-10-26 TW TW098136231A patent/TWI402954B/zh not_active IP Right Cessation
- 2009-11-10 KR KR1020090107967A patent/KR101730650B1/ko active IP Right Grant
- 2009-11-17 US US12/620,216 patent/US8263871B2/en active Active
- 2009-11-19 CN CN200910222812XA patent/CN101742813B/zh not_active Expired - Fee Related
Cited By (5)
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CN104349583A (zh) * | 2013-08-09 | 2015-02-11 | 钰桥半导体股份有限公司 | 具有复合芯层及双增层电路的线路板 |
CN106328633A (zh) * | 2015-06-30 | 2017-01-11 | 三星电机株式会社 | 电子装置模块及其制造方法 |
CN113439331A (zh) * | 2019-01-16 | 2021-09-24 | 凸版印刷株式会社 | 封装用基板及其制造方法 |
CN113811147A (zh) * | 2020-06-16 | 2021-12-17 | 株式会社日立制作所 | 存储装置 |
CN113811147B (zh) * | 2020-06-16 | 2023-06-06 | 株式会社日立制作所 | 存储装置 |
Also Published As
Publication number | Publication date |
---|---|
JP2010123708A (ja) | 2010-06-03 |
KR20100056376A (ko) | 2010-05-27 |
US8263871B2 (en) | 2012-09-11 |
US20100122838A1 (en) | 2010-05-20 |
TW201027697A (en) | 2010-07-16 |
KR101730650B1 (ko) | 2017-04-26 |
JP4730426B2 (ja) | 2011-07-20 |
TWI402954B (zh) | 2013-07-21 |
CN101742813B (zh) | 2013-02-13 |
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