CN100388492C - 控制输出阻抗和转换速率的半导体集成电路 - Google Patents
控制输出阻抗和转换速率的半导体集成电路 Download PDFInfo
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- CN100388492C CN100388492C CNB200410035004XA CN200410035004A CN100388492C CN 100388492 C CN100388492 C CN 100388492C CN B200410035004X A CNB200410035004X A CN B200410035004XA CN 200410035004 A CN200410035004 A CN 200410035004A CN 100388492 C CN100388492 C CN 100388492C
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Classifications
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
- H03K19/0175—Coupling arrangements; Interface arrangements
- H03K19/0185—Coupling arrangements; Interface arrangements using field effect transistors only
- H03K19/018557—Coupling arrangements; Impedance matching circuits
-
- A—HUMAN NECESSITIES
- A47—FURNITURE; DOMESTIC ARTICLES OR APPLIANCES; COFFEE MILLS; SPICE MILLS; SUCTION CLEANERS IN GENERAL
- A47K—SANITARY EQUIPMENT NOT OTHERWISE PROVIDED FOR; TOILET ACCESSORIES
- A47K1/00—Wash-stands; Appurtenances therefor
- A47K1/08—Accessories for toilet tables, e.g. glass plates, supports therefor
-
- E—FIXED CONSTRUCTIONS
- E03—WATER SUPPLY; SEWERAGE
- E03C—DOMESTIC PLUMBING INSTALLATIONS FOR FRESH WATER OR WASTE WATER; SINKS
- E03C1/00—Domestic plumbing installations for fresh water or waste water; Sinks
- E03C1/12—Plumbing installations for waste water; Basins or fountains connected thereto; Sinks
- E03C1/14—Wash-basins connected to the waste-pipe
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
- H03K19/0005—Modifications of input or output impedance
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
- H03K19/003—Modifications for increasing the reliability for protection
- H03K19/00369—Modifications for compensating variations of temperature, supply voltage or other physical parameters
- H03K19/00384—Modifications for compensating variations of temperature, supply voltage or other physical parameters in field effect transistor circuits
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
- H03K19/0175—Coupling arrangements; Interface arrangements
- H03K19/0185—Coupling arrangements; Interface arrangements using field effect transistors only
- H03K19/018585—Coupling arrangements; Interface arrangements using field effect transistors only programmable
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K17/00—Electronic switching or gating, i.e. not by contact-making and –breaking
- H03K17/16—Modifications for eliminating interference voltages or currents
- H03K17/161—Modifications for eliminating interference voltages or currents in field-effect transistor switches
- H03K17/162—Modifications for eliminating interference voltages or currents in field-effect transistor switches without feedback from the output circuit to the control circuit
- H03K17/163—Soft switching
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K17/00—Electronic switching or gating, i.e. not by contact-making and –breaking
- H03K17/16—Modifications for eliminating interference voltages or currents
- H03K17/161—Modifications for eliminating interference voltages or currents in field-effect transistor switches
- H03K17/162—Modifications for eliminating interference voltages or currents in field-effect transistor switches without feedback from the output circuit to the control circuit
- H03K17/163—Soft switching
- H03K17/164—Soft switching using parallel switching arrangements
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- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Physics & Mathematics (AREA)
- Mathematical Physics (AREA)
- General Engineering & Computer Science (AREA)
- Computing Systems (AREA)
- Health & Medical Sciences (AREA)
- Public Health (AREA)
- Hydrology & Water Resources (AREA)
- Water Supply & Treatment (AREA)
- Life Sciences & Earth Sciences (AREA)
- Environmental & Geological Engineering (AREA)
- Logic Circuits (AREA)
- Dram (AREA)
- Dc Digital Transmission (AREA)
- Semiconductor Integrated Circuits (AREA)
- Design And Manufacture Of Integrated Circuits (AREA)
Abstract
Description
Claims (14)
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP118528/2003 | 2003-04-23 | ||
JP2003118528A JP4428504B2 (ja) | 2003-04-23 | 2003-04-23 | 半導体集積回路装置 |
Publications (2)
Publication Number | Publication Date |
---|---|
CN1540756A CN1540756A (zh) | 2004-10-27 |
CN100388492C true CN100388492C (zh) | 2008-05-14 |
Family
ID=33498042
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CNB200410035004XA Expired - Lifetime CN100388492C (zh) | 2003-04-23 | 2004-04-23 | 控制输出阻抗和转换速率的半导体集成电路 |
Country Status (5)
Country | Link |
---|---|
US (4) | US7176729B2 (zh) |
JP (1) | JP4428504B2 (zh) |
KR (1) | KR20040092416A (zh) |
CN (1) | CN100388492C (zh) |
TW (1) | TWI335134B (zh) |
Families Citing this family (62)
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JP4201128B2 (ja) * | 2003-07-15 | 2008-12-24 | 株式会社ルネサステクノロジ | 半導体集積回路装置 |
JP3949647B2 (ja) | 2003-12-04 | 2007-07-25 | Necエレクトロニクス株式会社 | 半導体集積回路装置 |
KR100593451B1 (ko) | 2005-01-07 | 2006-06-28 | 삼성전자주식회사 | 데이터 출력 드라이버 및 이를 구비한 반도체 메모리 장치 |
JP4159553B2 (ja) * | 2005-01-19 | 2008-10-01 | エルピーダメモリ株式会社 | 半導体装置の出力回路及びこれを備える半導体装置、並びに、出力回路の特性調整方法 |
JP4846244B2 (ja) * | 2005-02-15 | 2011-12-28 | ルネサスエレクトロニクス株式会社 | 半導体装置 |
JP4577689B2 (ja) * | 2005-05-25 | 2010-11-10 | エルピーダメモリ株式会社 | 終端回路、および終端回路を備える半導体装置 |
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JP5123510B2 (ja) * | 2006-09-28 | 2013-01-23 | ルネサスエレクトロニクス株式会社 | 半導体装置 |
JP4958719B2 (ja) * | 2006-10-20 | 2012-06-20 | ルネサスエレクトロニクス株式会社 | 半導体集積回路 |
US7710169B2 (en) | 2006-10-20 | 2010-05-04 | Nec Electronics Corporation | Semiconductor integrated circuit controlling output impedance and slew rate |
US7902885B2 (en) * | 2006-12-28 | 2011-03-08 | Stmicroelectronics Pvt. Ltd. | Compensated output buffer for improving slew control rate |
US7598772B2 (en) * | 2006-12-29 | 2009-10-06 | Texas Instruments Incorporated | Signal driver having selectable aggregate slew rate to compensate for varying process, voltage or temperature conditions |
KR100857854B1 (ko) * | 2007-01-10 | 2008-09-10 | 주식회사 하이닉스반도체 | 효과적으로 온다이 터미네이션 동작 타이밍 조절이 가능한반도체 메모리 장치 |
JP2008182516A (ja) | 2007-01-25 | 2008-08-07 | Fujitsu Ltd | インタフェース回路および半導体集積回路 |
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JP5495477B2 (ja) * | 2007-04-23 | 2014-05-21 | ピーエスフォー ルクスコ エスエイアールエル | 出力インピーダンス調節回路を備えた半導体装置及び出力インピーダンスの試験方法 |
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JP5059580B2 (ja) * | 2007-12-20 | 2012-10-24 | ルネサスエレクトロニクス株式会社 | 終端回路 |
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- 2003-04-23 JP JP2003118528A patent/JP4428504B2/ja not_active Expired - Lifetime
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2004
- 2004-03-29 TW TW093108539A patent/TWI335134B/zh not_active IP Right Cessation
- 2004-04-16 KR KR1020040026177A patent/KR20040092416A/ko not_active Application Discontinuation
- 2004-04-22 US US10/829,380 patent/US7176729B2/en not_active Expired - Lifetime
- 2004-04-23 CN CNB200410035004XA patent/CN100388492C/zh not_active Expired - Lifetime
-
2006
- 2006-07-17 US US11/487,348 patent/US7262643B2/en not_active Expired - Lifetime
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2007
- 2007-08-09 US US11/889,098 patent/US7443212B2/en not_active Expired - Lifetime
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2008
- 2008-04-29 US US12/149,182 patent/US20080211548A1/en not_active Abandoned
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Also Published As
Publication number | Publication date |
---|---|
JP2004327602A (ja) | 2004-11-18 |
US7262643B2 (en) | 2007-08-28 |
TW200501575A (en) | 2005-01-01 |
JP4428504B2 (ja) | 2010-03-10 |
US7443212B2 (en) | 2008-10-28 |
TWI335134B (en) | 2010-12-21 |
US20080211548A1 (en) | 2008-09-04 |
CN1540756A (zh) | 2004-10-27 |
US20040251940A1 (en) | 2004-12-16 |
US20070296470A1 (en) | 2007-12-27 |
US20060255842A1 (en) | 2006-11-16 |
KR20040092416A (ko) | 2004-11-03 |
US7176729B2 (en) | 2007-02-13 |
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